Intel Desktop Board D815EEA2/D815EPEA2 Technical Product Specification
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Table 39. CNR Connector (J11B1) (Optional)
Pin Signal Name
Pin Signal Name
A1 Reserved B1 Reserved
A2 Reserved B2 Reserved
A3 Ground B3 Reserved
A4 Reserved B4 Ground
A5 Reserved B5 Reserved
A6 Ground B6 Reserved
A7 LAN_TXD2 B7 Ground
A8 LAN_TXD0 B8 LAN_TXD1
A9 Ground B9 LAN_RSTSYNC
A10 LAN_CLK B10 Ground
A11 LAN_RXD1 B11 LAN_RXD2
A12 Reserved B12 LAN_RXD0
A13 USB+ (optional)* B13 Ground
A14 Ground B14 Reserved
A15 USB- (optional)* B15 +5 V (dual)
A16 +12 V B16 USB_OC (optional)*
A17 Ground B17 Ground
A18 +3.3 V (dual) B18 -12 V
A19 +5 V B19 +3.3 V
A20 Ground B20 Ground
A21 EEDI B21 EED0
A22 EECS B22 EECK
A23 SMB_A1 B23 Ground
A24 SMB_A2 B24 SMB_A0
A25 SMB_SDA B25 SMB_SCL
A26 AC97_RESET B26 CDC_DWN_ENAB
A27 Reserved B27 Ground
A28 AC97_SDATA_IN1 B28 AC97_SYNC
A29 AC97_SDATA_IN0 B29 AC97_SDATA_OUT
A30 Ground B30 AC97_BITCLK
* These signals are used only with the optional SMSC LPC47M142 I/O controller. If the SMSC LPC47M132 I/O
controller is used, these signals are reserved.
For information about Refer to
The CNR Section 1.14, page 47