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Intel D815EEA2 User Manual

Intel D815EEA2
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Technical Reference
59
Table 14. I/O Map (continued)
Address (hex) Size Description
FFA0 - FFA7 8 bytes Primary bus master IDE registers
FFA8 - FFAF 8 bytes Secondary bus master IDE registers
96 contiguous bytes starting on a
128-byte divisible boundary
ICH2 (ACPI + TCO)
64 contiguous bytes starting on a
64-byte divisible boundary
D815EEA2/D815EPEA2 board resource
64 contiguous bytes starting on a
64-byte divisible boundary
ICH2 LAN controller
64 contiguous bytes starting on a
64-byte divisible boundary
ICH2 AC 97 audio master
256 contiguous bytes starting on a
256-byte divisible boundary
ICH2 AC 97 audio mixer
256 contiguous bytes starting on a
256-byte divisible boundary
ICH2 AC 97 modem mixer
32 contiguous bytes starting on a
32-byte divisible boundary
ICH2 USB controller #1
32 contiguous bytes starting on a
32-byte divisible boundary
ICH2 USB controller #2
16 contiguous bytes starting on a
16-byte divisible boundary
ICH2 (SMBus)
4096 contiguous bytes starting on a
4096-byte divisible boundary
Intel 82801BA PCI bridge
* Default, but can be changed to another address range.
** Dword access only
*** Byte access only
NOTE
Some additional I/O addresses are not available due to ICH2 addresses aliassing.
For information about Refer to
ICH2 addressing Section 1.3, page 19

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Intel D815EEA2 Specifications

General IconGeneral
BrandIntel
ModelD815EEA2
CategoryMotherboard
LanguageEnglish

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