Intel P4304XXMUXX User Manual

Intel
®
Server Chassis P4304XXMFEN2/P4304XXMUXX Product Family System Integration and Service Guide
153
In the following example, the BIOS sends a value of ACh to the diagnostic LED decoder. The LEDs are
decoded as follows:
Note: Diagnostic LEDs are best read and decoded when viewing the LEDs from the back of the system.
Table 9. POST Progress Code LED Example
LED #3
LED #2
LED #1
LED #0
8h (MSB)
4h
2h
1h (LSB)
LED
Status
ON
off
ON
off
Upper Nibble: Ah
ON
ON
off
off
Lower Nibble: Ch
8h (MSB)
4h
2h
1h (LSB)
POST CODE: ACh
LED #3
LED #2
LED #1
LED #0
Upper nibble bits = 1010b = Ah; Lower nibble bits = 1100b = Ch; the two are concatenated as ACh
Early POST Memory Initialization MRC Diagnostic Codes
Memory Initialization at the beginning of POST includes multiple functions, such as: discovery, channel
training, validation that the DIMM population is acceptable and functional, initialization of the IMC and other
hardware settings, and initialization of applicable RAS configurations.
The MRC Progress Codes are displayed to the diagnostic LEDs that show the execution point in the MRC
operational path at each step.
Table 10. MRC Progress Codes
Diagnostic LED Decoder
LED #
LED 3 LED 2 LED 1 LED 0
Description
Checkpoint
Upper
Nibble
8h
(MSB)
4h 2h
1h
(LSB)
Lower
Nibble
8h
(MSB)
4h 2h
1h
(LSB)
MRC Progress Codes
B0h
Upper
Nibble
ON off ON ON
Detect DIMM population.
Lower
Nibble
off off off off
B1h
Upper
Nibble
ON off ON ON
Set DDR4 frequency.
Lower
Nibble
off off off ON

Intel P4304XXMUXX Specifications

General

Brand	Intel
Model	P4304XXMUXX
Category	Chassis
Language	English