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Intel P4304XXMUXX

Intel P4304XXMUXX
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Intel
®
Server Chassis P4304XXMFEN2/P4304XXMUXX Product Family System Integration and Service Guide
164
Diagnostic LED Decoder
LED #
LED 3 LED 2 LED 1 LED 0
Description
Checkpoint
Upper Nibble
8h
(MSB)
4h 2h
1h
(LSB)
Lower Nibble
8h
(MSB)
4h 2h
1h
(LSB)
Lower Nibble
1
0
1
1
Memory Test Failure
Edh
Upper Nibble
1
1
1
0
DIMM Configuration/Population Error:
Lower Nibble
1
1
0
1
EFh
Upper Nibble
1
1
1
0
Indicates a CLTT Table Structure Error.
Lower Nibble
1
1
1
1
B0h
Upper Nibble
1
0
1
1
Detect DIMM Population
Lower Nibble
0
0
0
0
B1h
Upper Nibble
1
0
1
1
Set DDR4 Frequency
Lower Nibble
0
0
0
1
B2h
Upper Nibble
1
0
1
1
Gather Remaining SPD Data
Lower Nibble
0
0
1
0
B3h
Upper Nibble
1
0
1
1
Program registers on the memory controller level
Lower Nibble
0
0
1
1
B4h
Upper Nibble
1
0
1
1
Evaluate RAS modes and save rank information
Lower Nibble
0
1
0
0
B5h
Upper Nibble
1
0
1
1
Program registers on the channel level
Lower Nibble
0
1
0
1
B6h
Upper Nibble
1
0
1
1
Perform the JEDEC defined initialization sequence
Lower Nibble
0
1
1
0
B7h
Upper Nibble
1
0
1
1
Train DDR4 ranks
Lower Nibble
0
1
1
1
B8h
Upper Nibble
1
0
1
1
Initialize CLTT/OLTT
Lower Nibble
1
0
0
0
B9h
Upper Nibble
1
0
1
1
Hardware Memory Test and Initialization
Lower Nibble
1
0
0
1
Bah
Upper Nibble
1
0
1
1
Execute Software Memory Initialization
Lower Nibble
1
0
1
0
BBh
Upper Nibble
1
0
1
1
Program Memory Map and Interleaving
Lower Nibble
1
0
1
1
BCh
Upper Nibble
1
0
1
1
Program RAS Configuration
Lower Nibble
1
1
0
0
BFh
Upper Nibble
1
0
1
1

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