CP3003-SA Functional Description
ID 1052-6929, Rev. 3.0 Page 2 - 17
D R A F T — F O R I N T E R N A L U S E O N L Y
2.11.10 CompactPCI Connectors J1 and J2
The CP3003-SA provides two CompactPCI connectors, J1
and J2, with the following functionality:
• J1: 32-bit CompactPCI interface with PCI bus
signals, arbitration, clock and power
• J2: arbitration, clock and optionally rear I/O interface
functionality
The CP3003-SA is designed for a CompactPCI bus
architecture and the board is capable of driving up to
seven CompactPCI slots with individual arbitration and
clock signals.
The CompactPCI standard is electrically identical to the
PCI local bus. However, these systems are enhanced to
operate in rugged industrial environments and to support
multiple slots.
2.11.10.1 CompactPCI Connector Keying
CompactPCI backplane connectors support guide lugs to
ensure a correct polarized mating (3.3 V or 5 V V(I/O)
coding).
The CP3003-SA supports universal (3.3 V and 5 V) PCI
V(I/O) signaling voltages with one common termination re-
sistor configuration. Therefore, the CP3003-SA can be in-
serted in both, 3.3 V and 5 V CompactPCI systems and
provides itself no guide lug.
J2
ED C B A
1
22
1
J1
25
F Z
Note:
Pinrow F: GND
Pinrow Z: NC
Figure 2-5: CPCI Connectors
J1/J2
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