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Kontron CP3003-SA - Reset Status Register (RSTAT)

Kontron CP3003-SA
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CP3003-SA Configuration
ID 1052-6929, Rev. 3.0 Page 4 - 9
D R A F T — F O R I N T E R N A L U S E O N L Y
4.2.6 Reset Status Register (RSTAT)
The Reset Status Register is used to determine the host’s reset source.
Table 4-8: Reset Status Register (RSTAT)
REGISTER NAME RESET STATUS REGISTER (RSTAT)
ADDRESS 0x285
BIT NAME DESCRIPTION
RESET
VALUE
ACCESS
7 PORS Power-on reset status:
0 = System reset generated by software (warm reset)
1 = System reset generated by power-on (cold reset)
Writing a ’1’ to this bit clears the bit.
N/A R/W
6 - 3 Res. Reserved 0000 R
2 FPRS Front panel push button reset status (CP3003-HDD / CP3003-XMC):
0 = System reset not generated by front panel reset
1 = System reset generated by front panel reset
Writing a ’1’ to this bit clears the bit.
0R/W
1 CPRS CompactPCI reset status (PRST signal):
0 = System reset not generated by CPCI reset input
1 = System reset generated by CPCI reset input
Writing a ’1’ to this bit clears the bit.
0R/W
0 WTRS Watchdog timer reset status:
0 = System reset not generated by Watchdog timer
1 = System reset generated by Watchdog timer
Writing a ’1’ to this bit clears the bit.
0R/W
Note ...
The Reset Status Register is set to the default values by power-on reset, not by
a warm reset.

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