NCR RealPOS 70 - Page 248

12-8 Chapter 12: Cash Drawer Interface
GP_LVL2—GPIO Level for Input or Output 2 Register
Offset Address: GPIOBASE +38h Attribute: R/W
Default Value: 00000FFFh Size: 32-bit
Lockable: No Power Well: See below
Bit Description
31:12
Always0.NocorrespondingGPIO.
11:0
GP_IO_SEL2[43:32] — R/W.Whensettoa1,thecorrespondingGPIO
signal(ifenabledintheGPIO_USE_SEL2register)isprogrammedas
aninput.Whensetto0,theGPIOsignalisprogrammedasanoutput.
Bit Description
31:12 Reserved. Read-only 0
11:0
GP_LVL2[43:32]—R/W.IfGPIO[n]isprogrammedtobeanoutput
(viathecorrespondingbitintheGP_IO_SEL2register),thenthe
correspondingGP_LVL2[n]bitcanbeupdatedbysoftwaretodrivea
highorlowvalueontheoutputpin.1=high,0=low.IfGPIO[n]is
programmedas
aninput,thenthecorrespondingGP_LVL2bitreflects
thestateoftheinputsignal(1=high,0=low).Writeswillhaveno
effect.
SincethesebitscorrespondtoGPIOthatareinthecorewell,thesebits
willberesetbyPCIRST#.
ThreeGPObitsandoneGPI
bitofSouthBridgeICH4areusedto
controlthecashdrawer(s).Theyaredefinedbelow:
GPIO 32 CD_SW_AB
Input1,highDrawer(s)closed.Input0,lowDrawer(s)open.
GPIO 33 CD_SOL_A
Output0,lowturnoffsolenoidA.Output1,highActivates
SolenoidA.
GPIO 34 CD_SOL_B
Output0,lowturnoffsolenoidB.Output1,high
Activates
SolenoidB.