Nokia NSW-5 Series

NSW-5
System Module UT5U
PAMS Technical Documentation
Page 45
Issue 1 10/00
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FunctionUnitMaxTypMinParameterToFrom/
Control
Signal
name
IF2DP/
IF2DN
ERO-
TUS
Cobba_D
IF2 frequency 450 kHz Differential IF2–sig-
nal
to RX A/D–converter,
PGA = 0 dB
Output level 170 1400
mVpp
Source imp. 300 Ω
RFC VCTCX
O
Cobba_D
(via ERO-
TUS
Frequency 19.44 MHz High stability clock
signal for the logic
circuits
Signal amplitude 0.2 1.0 Vpp
Load resistance 10 kΩ
Load capacitance 5 pF
RFCEN MAD
(CTID,
RFCEN )
CCONT,
Cobba_D,
RF block
2V8 regu-
Logic high ”1” 2.0 V Supply voltage VR1
ON, RFC enable, RF
block 2V8 regulator
(PENTA) enable
g
lator
Logic low ”0” 0.5 V Supply voltage VR1
OFF, RFC disable,
RF block 2V8 regula-
tor (PENTA) disable
Current 100 uA
MCU, DSP
timing inaccuracy 50 us
RSSI ERO-
TUS
CCONT
Voltage 0.1 1.5 V Analog mode
field strength
indicator voltage
Digital mode
Load resistance 0.5 MΩ
Load capacitance 50 pF
RXPWR2 MAD
(CTID,
RF block
2V8
Logic high ”1” 2.0 V Supply voltage VR8
ON
DSP
FTC)
MUX
regulator
Logic low ”0” 0.5 V Supply voltage VR8
OFF
MUX
Current 100 uA DSP
timing inaccuracy 30 us
RXPWR3 MAD
(CTID,
RF block
2V8
Logic high ”1” 2.0 V Supply voltage VR9
ON
DSP
FTC)
MUX
regulator
Logic low ”0” 0.5 V Supply voltage VR9
OFF
MUX
Current 100 uA DSP
timing inaccuracy 30 us