MS51
Nov. 28, 2019 Page 205 of 491 Rev 1.00
MS51 32K SERIES TECHNICAL REFERENCE MANUAL
XTLCON – XLT Clock Control (TA Protected)
HXT gain value select
000 = L0 mode (smallest value)
001 = L1 mode
010 = L2 mode
011 = L3 mode
100 = L4 mode
101 = L5 mode
110 = L6 mode
111 = L7 mode (largest value)
System Clock Switching 6.2.1.5
The MS51 supports clock source switching on-the-fly by controlling CKSWT and CKEN registers via
software. It provides a wide flexibility in application. Note that these SFRs are writing TA protected for
precaution. With this clock source control, the clock source can be switched between the external
clock source and the internal oscillator, even between the high and low-speed internal oscillator.
However, during clock source switching, the device requires some amount of warm-up period for an
original disabled clock source. Therefore, use should follow steps below to ensure a complete clock
source switching. User can enable the target clock source by writing proper value into CKEN register,
wait for the clock source stable by polling its status bit in CKSWT register, and switch to the target
clock source by changing OSC[1:0] (CKSWT[2:1]). After these step, the clock source switching is
successful and then user can also disable the original clock source if power consumption is
concerned. Note that if not following the steps above, the hardware will take certain actions to deal
with such illegal operations as follows.
1. If user tries to disable the current clock source by changing CKEN value, the device will
ignore this action. The system clock will remain the original one and CKEN will remain the
original value.
2. If user tries to switch the system clock source to a disabled one by changing OSC[1:0] value,
OSC[1:0] value will be updated right away. But the system clock will remain the original one
and CKSWTF flag will be set by hardware.
To Next Page
Loading...
