Nuvoton NuMicro MS51PC0AE - Table 6.12-1 Slave Select Pin Configurations

MS51
Nov. 28, 2019 Page 438 of 491 Rev 1.00
MS51 32K SERIES TECHNICAL REFERENCE MANUAL
SPCR2 – Serial Peripheral Control Register 2
Register
SFR Address
Reset Value
SPCR2
F3H, Page 1
0000_0000 b
7
6
5
4
3
2
1
0
-
-
-
-
-
-
SPIS1
SPIS0
-
-
-
-
-
-
R/W
R/W
Bit
Name
Description
7:2
-
Reserved
1:0
SPIS[1:0]
SPI Interval time selection between adjacent bytes
SPIS[1:0] and CPHA select eight grades of SPI interval time selection between
adjacent bytes. As below table:
CPHA
SPIS1
SPIS0
SPI clock
0
0
0
0.5
0
0
1
1.0
0
1
0
1.5
0
1
1
2.0
1
0
0
1.0
1
0
1
1.5
1
1
0
2.0
1
1
1
2.5
SPIS[1:0] are valid only under Master mode (MSTR = 1).
Table 6.12-1 Slave Select Pin Configurations
DISMODF
SSOE
Master Mode (MSTR = 1)
Slave Mode (MSTR = 0)
0
X
SS




input for Mode Fault
SS




Input for Slave select
1
0
General purpose I/O
1
1
Automatic SS




output