Nuvoton NuMicro MS51PC0AE - Figure 6.11-11 Flow and Status of Master Receiver Mode

MS51
Nov. 28, 2019 Page 414 of 491 Rev 1.00
MS51 32K SERIES TECHNICAL REFERENCE MANUAL
Master Receiver Mode
In the master receiver mode, several bytes of data are received from a slave transmitter. The
transaction is initialized just as the master transmitter mode. Following the START condition, I2CnDAT
should be loaded with the target slave address and the data direction bit “read” (SLA+R). After the
SLA+R byte is transmitted and an acknowledge bit has been returned, the SI flag is set again and
I2CnSTAT is read as 40H. SI flag then should be cleared to receive data from the slave transmitter. If
AA flag (I2CnCON.2) is set, the master receiver will acknowledge the slave transmitter. If AA is
cleared, the master receiver will not acknowledge the slave and release the slave transmitter as a not
addressed slave. After that, the master can generate a STOP condition or a repeated START
condition to terminate the transmission or initial another one.
I2CnDAT
(SLA+R)
ACK
NAK
I2CnDAT
(Data)
NAK
I2CnDAT
(Data)
ACK
P S
P
Sr
I2CnDAT=SLA+R
(STA,STO,SI,AA)=(0,0,1,x)
STATUS=0x40
STATUS=0x48
STATUS=0x08
STATUS=0xF8
STATUS=0x10
STATUS=0x50
STATUS=0x58
(STA,STO,SI,AA)=(0,0,1,1)
(STA,STO,SI,AA)=(0,0,1,0)
(STA,STO,SI,AA)=(1,1,1,x)
(STA,STO,SI,AA)=(0,1,1,x)
(STA,STO,SI,AA)=(1,0,1,x)
S
STATUS=0x08
(STA,STO,SI,AA)=(1,0,1,x)
Master to Slave
Slave to Master
Arbitration Lost
I2CnDAT
(Data)
ACK
(STA,STO,SI,AA)=(0,0,1,0)
(Arbitration Lost) ACK
STATUS=0x38
I2CnDAT
(SLA+R)
ACK/
NAK
I2CnDAT=SLA+R
(STA,STO,SI,AA)=(0,0,1,X)
(Arbitration Lost)
STATUS=0x38
(STA,STO,SI,AA)=(0,0,1,X)
...
I
2
C bus will be release;
Not addressed SLV mode will be enterd
...
(STA,STO,SI,AA)=(1,0,1,X)
A START will be transmitted
when the bus becomes free
Enter not addressed SLV
mode
Send a START when bus becomes
free
MR
MT
MR
Master Receiver
MR
I2CnDAT
(SLA+R)
ACK
I2CnDAT=SLA+R
(STA,STO,SI,AA)=(0,0,1,1)
(Arbitration Lost) ACK
STATUS= 0x68, 0x78, 0xB0
To corresponding states in
slave mode
Figure 6.11-11 Flow and Status of Master Receiver Mode