MS51
Nov. 28, 2019 Page 37 of 491 Rev 1.00
MS51 32K SERIES TECHNICAL REFERENCE MANUAL
6.1.7 Special Function Register (SFR)
The MS51 uses Special Function Registers (SFR) to control and monitor peripherals and their modes.
The SFR reside in the register locations 80 to FFH and are accessed by direct addressing only. SFR
those end their addresses as 0H or 8H are bit-addressable. It is very useful in cases where user would
like to modify a particular bit directly without changing other bits via bit-field instructions. All other SFR
are byte-addressable only. The MS51 contains all the SFR presenting in the standard 8051. However
some additional SFR are built in. Therefore, some of unused bytes in the original 8051 have been
given new functions. The SFR are listed below.
SFR Page Selection 6.1.7.1
To accommodate more than 128 SFR in the 0x80 to 0xFF address space, SFR paging has been
implemented. By default, all SFR accesses target SFR Page 0. During device initialization, some SFR
located on SFR Page 1/2 may need to be accessed. The register SFRS is used to switch SFR
addressing page.
Note: In particular, since the interrupt is unpredictable, it is recommended to add following action in
each interrupt subroutine. Push SFRS in the stack at the beginning of the interrupt vector program and
pop SFRS when exiting the interrupt.
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