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MS51
Nov. 28, 2019 Page 207 of 491 Rev 1.00
MS51 32K SERIES TECHNICAL REFERENCE MANUAL
CKSWT Clock Switch
Register
SFR Address
Reset Value
CKSWT
96H, PAGE 0, TA protected
0011_0000 b
7
6
5
4
3
2
1
0
HXTST
ECKP00ST
HIRCST
LIRCST
ECKP30ST
OSC[1:0]
-
R
R
R
R
R
W
-
Bit
Name
Description
7
HXTST
High-speed external crystal 4 MHz to 24 MHz status
0 = High-speed external crystal is not stable or disabled.
1 = High-speed external crystal is enabled and stable.
6
ECKP00ST
External clock P00 input status
0 = External clock P00 input is not stable or disabled.
1 = External clock P00 input is enabled and stable.
5
HIRCST
High-speed internal oscillator 16 MHz status
0 = High-speed internal oscillator is not stable or disabled.
1 = High-speed internal oscillator is enabled and stable.
-
-
Reserved
3
ECKP30ST
External clock P30 input status
0 = External clock P30 input is not stable or disabled.
1 = External clock P30 input is enabled and stable.
2:1
OSC[1:0]
Oscillator selection bits
This field selects the system clock source.
00 = Internal 16 MHz oscillator.
01 = External clock source according to EXTEN[1:0] (CKEN[7:6]) setting.
10 = Internal 10 kHz oscillator.
11 = Reserved.
Note that this field is write only. The read back value of this field may not correspond to the
present system clock source.

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