Nuvoton NuMicro MS51PC0AE - Page 301

MS51
Nov. 28, 2019 Page 301 of 491 Rev 1.00
MS51 32K SERIES TECHNICAL REFERENCE MANUAL
T2CON – Timer 2 Control
Register
SFR Address
Reset Value
T2CON
C8H, All pages, Bit addressable
0000_0000 b
7
6
5
4
3
2
1
0
TF2
-
-
-
-
TR2
-
CM/RL2






R/W
-
-
-
-
R/W
-
R/W
Bit
Name
Description
7
TF2
Timer 2 overflow flag
This bit is set when Timer 2 overflows or a compare match occurs. If the Timer 2 interrupt and the
global interrupt are enable, setting this bit will make CPU execute Timer 2 interrupt service routine.
This bit is not automatically cleared via hardware and should be cleared via software.
5:3
-
Reserved
2
TR2
Timer 2 run control
0 = Timer 2 Disabled. Clearing this bit will halt Timer 2 and the current count will be preserved in
TH2 and TL2.
1 = Timer 2 Enabled.
1
-
Reserved
0
CM/RL2






Timer 2 compare or auto-reload mode select
This bit selects Timer 2 functioning mode.
0 = Auto-reload mode.
1 = Compare mode.