MS51
Nov. 28, 2019 Page 373 of 491 Rev 1.00
MS51 32K SERIES TECHNICAL REFERENCE MANUAL
9th received bit
The bit identifies the logic level of the 9th received bit in serial port 0 Mode 2 or 3. In Mode 1, RB8 is
the logic level of the received stop bit. SM2 bit as logic 1 has restriction for exception. RB8 is not
used in Mode 0.
Transmission interrupt flag
This flag is set by hardware when a data frame has been transmitted by the serial port 0 after the
8th bit in Mode 0 or the last data bit in other modes. When the serial port 0 interrupt is enabled,
setting this bit causes the CPU to execute the serial port 0 interrupt service routine. This bit should
be cleared manually via software.
Receiving interrupt flag
This flag is set via hardware when a data frame has been received by the serial port 0 after the 8th
bit in Mode 0 or after sampling the stop bit in Mode 1, 2, or 3. SM2 bit as logic 1 has restriction for
exception. When the serial port 0 interrupt is enabled, setting this bit causes the CPU to execute to
the serial port 0 interrupt service routine. This bit should be cleared manually via software.
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