Nuvoton NuMicro MS51PC0AE - Page 41

MS51
Nov. 28, 2019 Page 41 of 491 Rev 1.00
MS51 32K SERIES TECHNICAL REFERENCE MANUAL
Register
Definition
Address
Page
MSB
7
6
5
4
3
2
1
LSB
[1]
0
Reset
Value
[2]
TA
SC2TSR
SC2 Transfer Status
Register
EFH
2
ACT
BEF
FEF
PEF
TXEMPTY
TXOV
RXEMPTY
RXOV
0000 1010b
C2H
Input capture 2 high
byte
EEH
0
C2H[7:0]
0000 0000b
-
-
EEH
1
-
-
-
-
-
-
-
-
-
SC2IS
SC2 Interrupt Status
Register
EEH
2
-
-
-
ACERRIF
BGTIF
TERRIF
TBEIF
RDAIF
0000 0010b
C2L
Input capture 2 low
byte
EDH
0
C2L[7:0]
0000 0000b
-
-
EDH
1
-
-
-
-
-
-
-
-
-
SC2IE
SC2 Interrupt Enable
Control Register
EDH
2
-
-
-
ACERRIEN
BGTIEN
TERRIEN
TBEIEN
RDAIEN
0000 0000b
PIF
Pin interrupt flag
ECH
0
PIF7
PIF6
PIF5
PIF4
PIF3
PIF2
PIF1
PIF0
0000 0000b
-
-
ECH
1
-
-
-
-
-
-
-
-
-
SC2ETUR
D1
SC2 ETU Rate
Divider Register
ECH
2
-
SCDIV2
SCDIV1
SCDIV0
ETURDIV1
1
ETURDIV1
0
ETURDIV9
ETURDIV8
0000 0000b
PIPEN
Pin interrupt high
level/rising edge
enable
EBH
0
PIPEN7
PIPEN6
PIPEN5
PIPEN4
PIPEN3
PIPEN2
PIPEN1
PIPEN0
0000 0000b
-
-
EBH
1
-
-
-
-
-
-
-
-
-
SC2ETUR
D0
SC2 ETU Rate
Divider Register
EBH
2
ETURDIV[7:0]
0111 0011b
PINEN
Pin interrupt low
level/falling edge
enable
EAH
0
PINEN7
PINEN6
PINEN5
PINEN4
PINEN3
PINEN2
PINEN1
PINEN0
0000 0000b
-
-
EAH
1
-
-
-
-
-
-
-
-
-
SC2EGT
SC2 Extra Guard
Time Register
EAH
2
SC2EGT[7:0]
0000 0000b
PICON
Pin interrupt control
E9H
0
PIT7
PIT6
PIT5
PIT4
PIT3
PIT2
PIT1
PIT0
0000 0000b
-
-
E9H
1
-
-
-
-
-
-
-
-
-
SC2DR
SC2 Data Register
E9H
2
SC2DR[7:0]
0000 0000b
ADCCON0
ADC control 0
E8H
A
ADCF
ADCS
ETGSEL1
ETGSEL0
ADCHS3
ADCHS2
ADCHS1
ADCHS0
0000 0000b
C1H
Input capture 1 high
byte
E7H
0
C1H[7:0]
0000 0000b
-
-
E7H
1
-
-
-
-
-
-
-
-
-
SC1TSR
SC1 Transfer Status
Register
E7H
2
ACT
BEF
FEF
PEF
TXEMPTY
TXOV
RXEMPTY
RXOV
0000 1010b
C1L
Input capture 1 low
byte
E6H
0
C1L[7:0]
0000 0000b
-
-
E6H
1
-
-
-
-
-
-
-
-
-
SC1IS
SC1 Interrupt Status
Register
E6H
2
-
-
-
ACERRIF
BGTIF
TERRIF
TBEIF
RDAIF
0000 0010b
C0H
Input capture 0 high
byte
E5H
0
C0H[7:0]
0000 0000b
-
-
E5H
1
-
-
-
-
-
-
-
-
-
SC1IE
SC1 Interrupt Enable
Control Register
E5H
2
-
-
-
ACERRIEN
BGTIEN
TERRIEN
TBEIEN
RDAIEN
0000 0000b
C0L
Input capture 0 low
byte
E4H
0
C0L[7:0]
0000 0000b
-
-
E4H
1
-
-
-
-
-
-
-
-
-
SC1ETUR
D1
SC1 ETU Rate
Divider Register
E4H
2
-
SCDIV2
SCDIV1
SCDIV0
ETURDIV1
1
ETURDIV1
0
ETURDIV9
ETURDIV8
0011 0001b
ADCDLY
ADC trigger delay
E3H
0
ADCDLY[7:0]
0000 0000b
-
-
E3H
1
-
-
-
-
-
-
-
-
-
SC1ETUR
D0
SC1 ETU Rate
Divider Register
E3H
2
ETURDIV[7:0]
0111 0011b
ADCCON2
ADC control 2
E2H
0
ADFBEN
ADCMPOP
ADCMPEN
ADCMPO
ADCAQT2
ADCAQT1
ADCAQT0
ADCDLY.8
0000 0000b
-
-
E2H
1
-
-
-
-
-
-
-
-
-
SC1EGT
SC1 Extra Guard
Time Register
E2H
2
SC1EGT[7:0]
0000 0000b
ADCCON1
ADC control 1
E1H
0
OCEN
STADCPX
ADCDIV1
ADCDIV0
ETGTYP1
ETGTYP0
ADCEX
ADCEN
0000 0000b
-
-
E1H
1
-
-
-
-
-
-
-
-
-
SC1DR
SC1 Data Register
E1H
2
SC1DR[7:0]
0000 0000b
ACC
Accumulator
E0H
A
ACC.7
ACC.6
ACC.5
ACC.4
ACC.3
ACC.2
ACC.1
ACC.0
0000 0000b
PWM0CO
N1
PWM0 control 1
DFH
0
PWMMOD1
PWMMOD0
GP
PWMTYP
FBINEN
PWMDIV2
PWMDIV1
PWMDIV0
0000 0000b
-
-
DFH
1
-
-
-
-
-
-
-
-
-
SC0TSR
SC0 Transfer Status
Register
DFH
2
ACT
BEF
FEF
PEF
TXEMPTY
TXOV
RXEMPTY
RXOV
0000 1010b
PIOCON0
PWM0 I/O switch 0
DEH
0
-
-
PIO03
PIO01
PIO00
PIO10
PIO11
PIO12
0000 0000b
-
-
DEH
1
-
-
-
-
-
-
-
-
-
SC0IS
SC0 Interrupt Status
Register
DEH
2
-
-
-
ACERRIF
BGTIF
TERRIF
TBEIF
RDAIF
0000 0010b