1068
Instruction Execution Times and Number of Steps Section 4-1
Sequence Output Instructions
Note When a double-length operand is used, add 1 to the value shown in the length
column in the following table.
Sequence Control Instructions
Instruction Mnemonic Code Length (steps)
(See note.)
ON execution
time (µs)
Conditions
CP1H CP1L
OUTPUT OUT --- 1 0.35 1.10 ---
!OUT --- 2 +23.07 +6.05 Increase for immediate refresh
OUTPUT NOT OUT NOT --- 1 0.35 1.07 ---
!OUT NOT --- 2 +23.07 +5.94 Increase for immediate refresh
KEEP KEEP 11 1 0.40 5.55 ---
DIFFERENTIATE
UP
DIFU 13 2 0.50 2.37 ---
DIFFERENTIATE
DOWN
DIFD 14 2 0.50 2.34 ---
SET SET --- 1 0.30 1.40 ---
!SET --- 2 +23.17 +7.85 Increase for immediate refresh
RESET RSET --- 1 0.30 1.33 Word specified
!RSET --- 2 +23.17 +7.78 Increase for immediate refresh
MULTIPLE BIT SET SETA 530 4 11.77 16.10 With 1-bit set
67.03 107.50 With 1,000-bit set
MULTIPLE BIT
RESET
RSTA 531 4 11.8 16.11 With 1-bit reset
69.63 110.70 With 1,000-bit reset
SINGLE BIT SET SETB 532 2 0.5 25.13 ---
!SETB 3 +23.31 +30.88 ---
SINGLE BIT RESET RSTB 533 2 0.5 25.36 ---
!RSTB 3 +23.31 +31.11 ---
SINGLE BIT
OUTPUT
OUTB 534 2 0.45 27.03 ---
!OUTB 3 +23.22 +32.68 ---
Instruction Mnemonic Code Length
(steps)
(See
note.)
ON execution
time (µs)
Conditions
CP1H CP1L
END END 119.186.2---
NO OPERATION NOP 0 1 0.05 0.6 ---
INTERLOCK IL 2 1 0.15 3.4 ---
INTERLOCK CLEAR ILC 3 1 0.15 3.4 ---
MULTI-INTERLOCK
DIFFERENTIATION
HOLD
MILH 517 3 10.3 11.9 During interlock
13.3 11.9 Not during interlock and interlock not set
16.6 10.5 Not during interlock and interlock set
MULTI-INTERLOCK
DIFFERENTIATION
RELEASE
MILR 518 3 10.3 11.9 During interlock
13.3 11.9 Not during interlock and interlock not set
16.6 10.5 Not during interlock and interlock set
MULTI-INTERLOCK
CLEAR
MILC 519 2 8.3 6.4 Interlock not cleared
9.6 6.4 Interlock cleared
JUMP JMP 4 2 0.95 4.2 ---
JUMP END JME 5 2 --- --- ---
CONDITIONAL
JUMP
CJP 510 2 0.95 6.9 When JMP condition is satisfied
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