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Timer and Counter Instructions Section 3-5
Precautions Timer numbers are shared by the TIM, TIMX(550), TIMH(015), TIMHX(551),
TMHH(540), TMHHX(552), TTIM(087), TTIMX(555), TIMW(813),
TIMWX(816), TMHW(815), and TMHWX(817) instructions. If two timers share
the same timer number, but are not used simultaneously, a duplication error
will be generated when the program is checked, but the timers will operate
normally. Timers which share the same timer number will not operate properly
if they are used simultaneously.
Timers created with timer numbers 16 to 4095 will not operate properly when
the CPU Unit cycle time exceeds 100 ms. Use timer numbers 0 to 15 when
the cycle time is longer than 100 ms.
The present value of timers programmed with timer numbers 0 to 15 will be
updated even when the timer is on standby. The present value of timers pro-
grammed with timer numbers 16 to 4095 will be held when the timer is on
standby.
Timers will be reset or paused in the following cases. (When a timer is reset,
its PV is reset to the SV and its Completion Flag is turned OFF.)
Note (1) If the IOM Hold Bit (A500.12) has been turned ON, the status of timer
Completion Flags and PVs will be maintained when the operating mode
is changed.
(2) If the IOM Hold Bit (A500.12) has been turned ON and the status of the
IOM Hold Bit itself is protected in the PLC Setup, the status of timer Com-
pletion Flags and PVs will be maintained even when the power is inter-
rupted.
(3) The PV will be set to the SV when TIM/TIMX(550) is executed.
When TIM/TIMX(550) is in a program section between IL(002) and ILC(003)
and the program section is interlocked, the PV will be reset to the SV and the
Completion Flag will be turned OFF.
When an operating TIM/TIMX(550) timer created with a timer number
between 0 and 15 is in a jumped program section (JMP(004), CJMP(510),
CJPN(511), JME(005)), the timer’s PV will continue timing. The jumped TIM/
TIMX(550) instruction will not be executed, but the PV will be refreshed each
cycle after all tasks have been executed.
When a TIM/TIMX(550) timer is forced set, its Completion Flag will be turned
ON and its PV will be set to 0. When a TIM/TIMX(550) timer is forced reset, its
Completion Flag will be turned OFF and its PV will be reset to the SV.
The operation of the = Flag and N Flag depends on the model of the CPU
Unit. Refer to Flags, above, for details.
Condition PV Completion Flag
Operating mode changed from RUN or
MONITOR mode to PROGRAM mode
or vice versa.
1
0000 OFF
Power supply interrupted and reset
2
0000 OFF
Execution of CNR(545)/CNRX(547),
the RESET TIMER/COUNTER
instructions
3
BCD: 9999
Binary: FFFF
OFF
Operation in interlocked program sec-
tion
(IL(002)–ILC(003))
Reset to SV. OFF
Operation in jumped program section
(JMP(004)–JME(005))
PV continues decre-
menting.
Retains previous sta-
tus.
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