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Data Shift Instructions Section 3-8
Examples Shift Register Exceeding 16 Bits
The following example shows a 48-bit shift register using words CIO 1000 to
CIO 1002. A 1-s clock pulse is used so that the execution condition produced
by CIO 0.05 is shifted into a 3-word register between CIO 1000.00 and
CIO 1002.15 every second.
3-8-2 REVERSIBLE SHIFT REGISTER: SFTR(084)
Purpose Creates a shift register that shifts data to either the right or the left.
Ladder Symbol
Variations
Applicable Program Areas
Operands C: Control Word
Note St and E must be in the same data area.
Operand Specifications
E: CIO 1002 CIO 1001 CIO 1000
0.05
P_1s
0.06
1000
1002
(1-s clock)
Reset
Shift input
Data input
Lost
Contents of
CIO 0.05
St+1: St:
SFTR(084)
C
E
C: Control word
St: Starting word
E: End word
St
Variations Executed Each Cycle for ON Condition SFTR(084)
Executed Once for Upward Differentiation @SFTR(084)
Executed Once for Downward Differentiation Not supported
Immediate Refreshing Specification Not supported
Block program areas Step program areas Subroutines Interrupt tasks
OK OK OK OK
15 14 13 12
Data input
Reset
Shift input
Shift direction
1 (ON): Left
0 (OFF): Right
Area C St E
CIO Area CIO 0 to CIO 6143
Work Area W0 to W511
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