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Omron CP1H CPU User Manual

Omron CP1H CPU
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178
Data Registers Section 4-16
Normal instructions can be used to store data in Data Registers.
Forcing Bit Status Bits in Data Registers cannot be force-set and force-reset.
Examples The following examples show how Data Registers are used to offset the PLC
memory addresses in Index Registers.
LD DR0 ,IR0 Adds the contents of DR0 to the contents
of IR0 and loads the bit at that PLC mem-
ory address.
MOV(021) #0001 DR0 ,IR1 Adds the contents of DR0 to the contents
of IR1 and writes #0001 to that PLC
memory address.
Range of Values The contents of data registers are treated as signed binary data and thus
have a range of –32,768 to 32,767.
Data Register Initialization The Data Registers will be cleared in the following cases:
1. When the operating mode is changed from PROGRAM mode to
RUN/MONITOR mode or vice-versa and the IOM Hold Bit is OFF
2. When the power is cycled and the IOM Hold Bit is OFF or not protected in
the PLC Setup
IOM Hold Bit Operation If the IOM Hold Bit (A500.12) is ON, the Data Registers won’t be cleared
when a FALS error occurs or the operating mode is changed from PROGRAM
mode to RUN/MONITOR mode or vice-versa.
If the IOM Hold BIt (A500.12) is ON and the PLC Setup’s “IOM Hold Bit Status
at Startup” setting is set to protect the IOM Hold Bit, the Data Registers won’t
be cleared when the PLC’s power supply is reset (ON OFF ON).
Precautions Data Registers are normally local to each task. For example, DR0 used in
task 1 is different from DR0 used in task 2. (A PLC Setup setting can be made
from the CX-Programmer to share Data Registers between tasks.)
The content of Data Registers cannot be accessed (read or written) from the
CX-Programmer.
Do not use Data Registers until a value has been set in the register. The reg-
ister’s operation will be unreliable if they are used without setting their values.
The values in Data Registers are unpredictable at the start of an interrupt
task. When a Data Register will be used in an interrupt task, always set a
value in the Data Register before using the register in that task.
Set to a base value
with MOVR(560) or
MOVRW(561).
Set with a regular
instruction.
Pointer
I/O Memory
Hexadecimal content Decimal equivalent
8000 to FFFF –32,768 to –1
0000 to 7FFF 0 to 32,767

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Omron CP1H CPU Specifications

General IconGeneral
BrandOmron
ModelCP1H CPU
CategoryComputer Hardware
LanguageEnglish

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