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Memory Cassette Functions Section 6-5
• For XA CPU Units, the built-in analog output control is temporarily
stopped while a Memory Cassette data transfer or verification is in
progress. Therefore, if the IOM Hold Bit (A500.12) is ON and the exter-
nally transmitted analog output value is being held when the operating
mode is switched from RUN or MONITOR to PROGRAM and a Memory
Cassette data transfer or verification is executed, the analog output value
cannot be held during the transfer or verification and the value will be
changed. When the transfer or verification has been completed, the ana-
log output value will revert to the originally held value.
• The following table shows whether data transfers are enabled when the
CPU Unit is protected in various ways.
6-5-5 Procedure for Automatic Transfer from the Memory Cassette at
Startup
Use the following procedure to enable automatic transfer at startup.
1,2,3... 1. Prepare a Memory Cassette with the required data stored.
2. With the power supply turned OFF to the CPU Unit, remove the cover from
the Memory Cassette slot and insert the Memory Cassette.
3. Open the cover for the CPU Unit's PERIPHERAL section and set DIP
switch pin SW2 to ON.
4. Turn ON the power supply to the CPU Unit.
5. The automatic transfer from the Memory Cassette will begin, and the
progress of the transfer will be displayed at the 7-segment LED indicator.
6. After the automatic transfer has been completed, turn OFF the power sup-
ply to the CPU Unit.
Type of protection Transfer from CPU Unit
to Memory Cassette
Transfer from Memory
Cassette to CPU Unit
Not protected. Yes Yes
System protected by DIP switch
pin SW1 set to ON.
Ye s N o
Protected by password. Over-
writing and duplication both per-
mitted.
Ye s Ye s
Protected by password. Over-
writing prohibited and duplica-
tion permitted.
Yes Transfer enabled only at
startup.
Protected by password. Over-
writing permitted and duplica-
tion prohibited.
No Yes
Protected by password. Over-
writing and duplication both pro-
hibited.
No Transfer enabled only at
startup.
MEMORY
1 2 3 4 5 6
ON
DIP switch pin
SW2 set to ON.
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