Circuit-, IC descriptions and list of abbreviations
EN 244 DVDR70 & DVDR75/0x19.
VDDA1A_7118 ............. Power supply for analog input of VIP
VDDA2A_7118 ............. Power supply for analog input of VIP
VDDA3A_7118 ............. Power supply for analog input of VIP
VDDA4A_7118 ............. Power supply for analog input of VIP
VDDE_7118 .................Power supply digital for peripheral
cells of VIP
VDDI_7118................... Power supply digital for core of VIP
VDDX_7118 .................Power supply for crystal oscillator of
VIP
VE_DATA(7:0)..............Video Encoder data Bus
VE_DSN ....................... Video Encoder Data Strobe
VE_DTACKN................ Video Encoder Data Transfer
acknowledge
VIP_ERROR.................Video Input Processor error
VIP_FB ......................... Video Input Processor Fast Blanking
VIP_FID_FF .................Video Input Processor field indentifier
to Flip Flop
VIP_HS......................... Video Input Processor horizontal
synchronisation
VIP_ICLK......................Video Input Processor input Clock
VIP_IDQ ....................... Video Input Processor output data
qualifier
VIP_IGP1 .....................Video Input Processor input general
purpose 1
VIP_INT........................ Video Input Processor interrupt
VIP_RTS1 .................... Video Input Processor ready to send
VIP_VS......................... Video Input Processor vertical
synchronisation
VIP_YUV(7:0)............... Video Input Processor digital
video(CCIR 656)
VS_IN ........................... Vertical synchronisation IN
VSM_M_A(13:0 ............ )Versatile Stream Manager SDRAM
address bus
VSM_M_CASN............. Versatile Stream Manager SDRAM
column address strobe
VSM_M_CLKEN........... Versatile Stream Manager SDRAM
clock enable
VSM_M_CLKOUT ........ Versatile Stream Manager SDRAM
clock out
VSM_M_D(15:0)...........Versatile Stream Manager SDRAM
data bus
VSM_M_LDQM ............Versatile Stream Manager SDRAM
lower data mask enable
VSM_M_RASN............. Versatile Stream Manager SDRAM
row address strobe
VSM_M_UDQM............ Versatile Stream Manager SDRAM
upper data mask enable
VSM_M_WEN .............. Versatile Stream Manager SDRAM
write enable
VSM_UART1_CTSN .... Versatile Stream Manager UART1
clear to send to analog board (UART1
is gateway to analog board)
VSM_UART1_RTSN .... Versatile Stream Manager UART2
clear to send to DVIO board (UART2 is
gateway to DIVIO board)
VSM_UART1_RX......... Versatile Stream Manager UART1
ready to send to analog board
VSM_UART1_TX .........Versatile Stream Manager UART2
ready to send to DVIO board
VSM_UART2_CTSN .... Versatile Stream Manager UART1
received data to analog board
VSM_UART2_RTSN .... Versatile Stream Manager UART2
received data to DVIO board
VSM_UART2_RX......... Versatile Stream Manager UART1
transmitted data to analog board
VSM_UART2_TX .........VersatileStream Manager UART2
transmitted data to DVIO board
VSOUT ......................... Vertical synchronisation OUT
WE................................ Write Enable
Y_IN .............................Luminance input from analog board
Y_OUT .........................Luminance output from Host Decoder
Y_OUT_B ..................... Filtered luminance output
YY_OUT(9:0)................ Luminance output from FLI
Digital Board Chrysalis
ADC ............................. :Analog to Digital Converter
DAC ............................. :Digital to Analog Converter
DENC........................... :Digital (Video) Encoder (Video DAC)
DV ................................ : Digital Video (Camcorder)
EF ................................ : Emitter Follower
OSD ............................. :On-Screen Display
VIP ............................... :Video Input Processor (Video ADC)
2Fh............................... : Progressive scan video
2V5............................... +2V5 Power supply for Link+Codec
IC7431
3V3............................... +3V3 Power supply
3V3_A .......................... +3V3 Analog power supply for PHY
IC7400
3V3_D .......................... +3V3 Digital power supply for PHY
IC7400
3V3_DLY...................... +3V3 Power supply for IC7500
3V3_LINK..................... +3V3 Power supply for Link+Codec
IC7431
3V3_F .......................... +3V3 Power supply for optional Flash
memory IC7432
3V3_RAM..................... +3V3 Power supply for SDRAM
IC7430
3V3_uP ........................ +3V3 Power supply for Micro-
controller IC7802
3V3_32kHz .................. +3V3 Power supply for audio format
adaptation circuitry IC7507 and
IC7508
3V3_AC........................ +3V3 Power supply for audio system
clock generator IC7605 and IC7606
+5V............................... +5V Power supply
5V_PLL ........................ +5V Power supply for VCO of audio
PLL IC7604
A (1:17) ........................ Flash address lines of uPD72893
A_MUTE ...................... Audio Mute
ABCK ........................... Audio Bit Clock
AD (1:10)...................... Address bus lines for Host I/F of
Link+Codec IC7431
AEMP1......................... PCM1 emphasis ON/OFF for PCM1
output
AFS1 ............................ Audio sampling frequency indication
signal
ALRCLK ....................... Audio Word Select
AMCLK44..................... 11.2896MHz (=256 * 44.1 kHz) audio
master clock signal for 44.1 kHz audio
AMCLK48..................... 12.288MHz (=256 * 48 kHz) audio
master clock signal for 32 kHz and 48
kHz audio
APWM.......................... PWM signal for audio PLL
ASIC............................. Application Specific Integrated Circuit
BUFENn_AUD ............. Buffer Enable Audio
BUFENn_VID............... Buffer Enable Video
CLK27M_CON ............. 27MHz Clock to Digital Board
CS ................................ Parallel interface chip select input of
Link+Codec IC7431
CTL (0:1)...................... Link interface control lines
CTSN ........................... Clear to Send
D (0:15) ........................ Flash data lines of Link+Codec
IC7431
DCDi ............................ Directional Correlational
Deinterlacing. Circuitry that reduces
jaggies on diagonal edges when
deinterlacing video-sourced material.
DV_STATUS................ Interrupt pin for reading DV-status
HS_CLK ....................... Video clock input of Link+Codec
IC7431
INT ............................... Interrupt request output of Link+Codec
IC7431 (input to Micro-Controller)
IOR............................... Parallel interface IO read control input
of Link+Codec IC7431
ISPN............................. In System Programming signal (used
for programming IC7802)
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