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ST STM32F103 series Reference Manual

ST STM32F103 series
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DocID13902 Rev 15 624/1128
RM0008 Universal serial bus full-speed device interface (USB)
644
Double-buffering feature for a bulk endpoint is activated by:
Writing EP_TYPE bit field at ‘00 in its USB_EPnR register, to define the endpoint as a
bulk, and
Setting EP_KIND bit at ‘1 (DBL_BUF), in the same register.
The application software is responsible for DTOG and SW_BUF bits initialization according
to the first buffer to be used; this has to be done considering the special toggle-only property
that these two bits have. The end of the first transaction occurring after having set
DBL_BUF, triggers the special flow control of double-buffered bulk endpoints, which is used
for all other transactions addressed to this endpoint until DBL_BUF remain set. At the end of
each transaction the CTR_RX or CTR_TX bit of the addressed endpoint USB_EPnR
register is set, depending on the enabled direction. At the same time, the affected DTOG bit
in the USB_EPnR register is hardware toggled making the USB peripheral buffer swapping
completely software independent. Unlike common transactions, and the first one after
DBL_BUF setting, STAT bit pair is not affected by the transaction termination and its value
remains ‘11 (Valid). However, as the token packet of a new transaction is received, the
actual endpoint status will be masked as ‘10 (NAK) when a buffer conflict between the USB
peripheral and the application software is detected (this condition is identified by DTOG and
SW_BUF having the same value, see Table 170 on page 624). The application software
responds to the CTR event notification by clearing the interrupt flag and starting any
required handling of the completed transaction. When the application packet buffer usage is
over, the software toggles the SW_BUF bit, writing ‘1 to it, to notify the USB peripheral about
the availability of that buffer. In this way, the number of NAKed transactions is limited only by
the application elaboration time of a transaction data: if the elaboration time is shorter than
the time required to complete a transaction on the USB bus, no re-transmissions due to flow
control will take place and the actual transfer rate will be limited only by the host PC.
Table 170. Bulk double-buffering memory buffers usage
Endpoint
Type
DTOG SW_BUF
Packet buffer used by USB
Peripheral
Packet buffer used by
Application Software
IN
01
ADDRn_TX_0 / COUNTn_TX_0
Buffer description table locations.
ADDRn_TX_1 / COUNTn_TX_1
Buffer description table locations.
10
ADDRn_TX_1 / COUNTn_TX_1
Buffer description table locations
ADDRn_TX_0 / COUNTn_TX_0
Buffer description table locations.
0 0 None
(1)
1. Endpoint in NAK Status.
ADDRn_TX_0 / COUNTn_TX_0
Buffer description table locations.
1 1 None
(1)
ADDRn_TX_0 / COUNTn_TX_0
Buffer description table locations.
OUT
01
ADDRn_RX_0 / COUNTn_RX_0
Buffer description table locations.
ADDRn_RX_1 / COUNTn_RX_1
Buffer description table locations.
10
ADDRn_RX_1 / COUNTn_RX_1
Buffer description table locations.
ADDRn_RX_0 / COUNTn_RX_0
Buffer description table locations.
0 0 None
(1)
ADDRn_RX_0 / COUNTn_RX_0
Buffer description table locations.
1 1 None
(1)
ADDRn_RX_1 / COUNTn_RX_1
Buffer description table locations.

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ST STM32F103 series Specifications

General IconGeneral
BrandST
ModelSTM32F103 series
CategoryMicrocontrollers
LanguageEnglish

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