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RM0008 Advanced-control timers (TIM1&TIM8)
359
14.4.21 TIM1&TIM8 register map
TIM1&TIM8 registers are mapped as 16-bit addressable registers as described in the table
below:
Table 84. TIM1&TIM8 register map and reset values
Offset Register
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0x00
TIMx_CR1
Reserved
CKD
[1:0]
ARPE
CMS
[1:0]
DIR
OPM
URS
UDIS
CEN
Reset value 0000000000
0x04
TIMx_CR2
Reserved
OIS4
OIS3N
OIS3
OIS2N
OIS2
OIS1N
OIS1
TI1S
MMS[2:0]
CCDS
CCUS
Reserved
CCPC
Reset value 0000000000000 0
0x08
TIMx_SMCR
Reserved
ETP
ECE
ETPS
[1:0]
ETF[3:0]
MSM
TS[2:0]
Reserved
SMS[2:0]
Reset value 000000000000 000
0x0C
TIMx_DIER
Reserved
TDE
COMDE
CC4DE
CC3DE
CC2DE
CC1DE
UDE
BIE
TIE
COMIE
CC4IE
CC3IE
CC2IE
CC1IE
UIE
Reset value 000000000000000
0x10
TIMx_SR
Reserved
CC4OF
CC3OF
CC2OF
CC1OF
Reserved
BIF
TIF
COMIF
CC4IF
CC3IF
CC2IF
CC1IF
UIF
Reset value 0000 00000000
0x14
TIMx_EGR
Reserved
BG
TG
COMG
CC4G
CC3G
CC2G
CC1G
UG
Reset value 00000000
0x18
TIMx_CCMR1
Output Compare
mode
Reserved
OC2CE
OC2M
[2:0]
OC2PE
OC2FE
CC2S
[1:0]
OC1CE
OC1M
[2:0]
OC1PE
OC1FE
CC1S
[1:0]
Reset value 0000000000000000
TIMx_CCMR1
Input Capture
mode
Reserved
IC2F[3:0]
IC2
PSC
[1:0]
CC2S
[1:0]
IC1F[3:0]
IC1
PSC
[1:0]
CC1S
[1:0]
Reset value 0000000000000000
0x1C
TIMx_CCMR2
Output Compare
mode
Reserved
O24CE
OC4M
[2:0]
OC4PE
OC4FE
CC4S
[1:0]
OC3CE
OC3M
[2:0]
OC3PE
OC3FE
CC3S
[1:0]
Reset value 0000000000000000
TIMx_CCMR2
Input Capture
mode
Reserved
IC4F[3:0]
IC4
PSC
[1:0]
CC4S
[1:0]
IC3F[3:0]
IC3
PSC
[1:0]
CC3S
[1:0]
Reset value 0000000000000000
0x20
TIMx_CCER
Reserved
CC4P
CC4E
CC3NP
CC3NE
CC3P
CC3E
CC2NP
CC2NE
CC2P
CC2E
CC1NP
CC1NE
CC1P
CC1E
Reset value 00000000000000
0x24
TIMx_CNT
Reserved
CNT[15:0]
Reset value 0000000000000000
0x28
TIMx_PSC
Reserved
PSC[15:0]
Reset value 0000000000000000
0x2C
TIMx_ARR
Reserved
ARR[15:0]
Reset value 0000000000000000
0x30
TIMx_RCR
Reserved
REP[7:0]
Reset value 00000000
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