ST STM32F103 series Reference Manual

General-purpose and alternate-function I/Os (GPIOs and AFIOs) RM0008
179/1128 DocID13902 Rev 15
Table 45. TIM2 alternate function remapping
Alternate function
TIM2_REMAP[1:
0] = “00” (no
remap)
TIM2_REMAP[1:
0] = “01” (partial
remap)
TIM2_REMAP[1:
0] = “10” (partial
remap)
(1)
1. Remap not available on 36-pin package.
TIM2_REMAP[1:
0] = “11” (full
remap)
(1)
TIM2_CH1_ETR
(2)
2. TIM_CH1 and TIM_ETR share the same pin but cannot be used at the same time (which is why we have
this notation: TIM2_CH1_ETR).
PA0PA15PA0PA15
TIM2_CH2 PA1 PB3 PA1 PB3
TIM2_CH3 PA2 PB10
TIM2_CH4 PA3 PB11
Table 46. TIM1 alternate function remapping
Alternate functions
mapping
TIM1_REMAP[1:0] =
“00” (no remap)
TIM1_REMAP[1:0] =
“01” (partial remap)
TIM1_REMAP[1:0] =
“11” (full remap)
(1)
1. Remap available only for 100-pin and 144-pin packages.
TIM1_ETR PA12 PE7
TIM1_CH1 PA8 PE9
TIM1_CH2 PA9 PE11
TIM1_CH3 PA10 PE13
TIM1_CH4 PA11 PE14
TIM1_BKIN PB12
(2)
2. Remap not available on 36-pin package.
PA6 PE15
TIM1_CH1N PB13 PA7 PE8
TIM1_CH2N PB14
(2)
PB0 PE10
TIM1_CH3N PB15
(2)
PB1 PE12
Table 47. TIM9 remapping
(1)
1. Refer to the AF remap and debug I/O configuration register Section 9.4.7: AF remap and debug I/O
configuration register2 (AFIO_MAPR2).
Alternate function TIM9_REMAP = 0 TIM9_REMAP = 1
TIM9_CH1 PA2 PE5
TIM9_CH2 PA3 PE6
Table 48. TIM10 remapping
(1)
1. Refer to the AF remap and debug I/O configuration register Section 9.4.7: AF remap and debug I/O
configuration register2 (AFIO_MAPR2).
Alternate function TIM10_REMAP = 0 TIM10_REMAP = 1
TIM10_CH1 PB8 PF6

ST STM32F103 series Specifications

General

Brand	ST
Model	STM32F103 series
Category	Microcontrollers
Language	English