Serial peripheral interface (SPI) RM0008
717/1128 DocID13902 Rev 15
Figure 251. Transmitting 0x8EAA33
• In reception mode:
if data 0x8EAA33 is received:
Figure 252. Receiving 0x8EAA33
Figure 253. I
2
S Philips standard (16-bit extended to 32-bit packet frame with
CPOL = 0)
When 16-bit data frame extended to 32-bit channel frame is selected during the I
2
S
configuration phase, only one access to SPI_DR is required. The 16 remaining bits are
forced by hardware to 0x0000 to extend the data to 32-bit format.
If the data to transmit or the received data are 0x76A3 (0x76A30000 extended to 32-bit), the
operation shown in Figure 254 is required.
0x8EAA 0x33XX
Only the 8 MSBs are sent to complete the 24 bits
First write to Data register
Second write to Data register
8 LSB bits have no meaning and could be
anything
0x8EAA 0x3300
Only the 8MSB are right
First read from Data register
Second read from Data register
The 8 LSB will always be 00
CK
WS
SD
Channel left 32-bit
Channel right
MSB
LSB
16-bit remaining
16-bit data
0 forced
Transmission Reception
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