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ST STM32F105 series User Manual

ST STM32F105 series
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Universal synchronous asynchronous receiver transmitter (USART) RM0008
783/1128 DocID13902 Rev 15
27.3.1 USART character description
Word length may be selected as being either 8 or 9 bits by programming the M bit in the
USART_CR1 register (see Figure 279).
The TX pin is in low state during the start bit. It is in high state during the stop bit.
An Idle character is interpreted as an entire frame of “1”s followed by the start bit of the
next frame which contains data (The number of “1” ‘s will include the number of stop bits).
A Break character is interpreted on receiving “0”s for a frame period. At the end of the
break frame the transmitter inserts either 1 or 2 stop bits (logic “1” bit) to acknowledge the
start bit.
Transmission and reception are driven by a common baud rate generator, the clock for each
is generated when the enable bit is set respectively for the transmitter and receiver.
The details of each block is given below.
Figure 279. Word length programming
Bit0
Bit1
Bit2
Bit3
Bit4
Bit5
Bit6
Bit7
Bit8
Start
bit
Stop
bit
Next
Start
bit
Idle frame
Bit0
Bit1
Bit2
Bit3
Bit4
Bit5
Bit6
Bit7
Start
Bit
Stop
Bit
Next
Start
Bit
Idle frame
Start
bit
9-bit word length (M bit is set), 1 stop bit
8-bit word length (M bit is reset), 1 stop bit
Possible
parity
bit
Possible
Parity
Bit
Break frame
Start
bit
Stop
bit
Data frame
Break frame
Start
bit
Stop
bit
Data frame
Next data frame
Next data frame
Start
bit
****
** LBCL bit controls last data clock pulse
Clock
Clock
** LBCL bit controls last data clock pulse
**
**

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ST STM32F105 series Specifications

General IconGeneral
BrandST
ModelSTM32F105 series
CategoryMicrocontrollers
LanguageEnglish

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