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RM0008 Interrupts and events
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10 Interrupts and events
Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx
microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes.
Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx
microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes.
High-density devices are STM32F101xx and STM32F103xx microcontrollers where the
Flash memory density ranges between 256 and 512 Kbytes.
XL-density devices are STM32F101xx and STM32F103xx microcontrollers where the
Flash memory density ranges between 768 Kbytes and 1 Mbyte.
Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers.
This Section applies to the whole STM32F10xxx family, unless otherwise specified.
10.1 Nested vectored interrupt controller (NVIC)
Features
• 68 (not including the sixteen Cortex
®
-M3 interrupt lines)
• 16 programmable priority levels (4 bits of interrupt priority are used)
• Low-latency exception and interrupt handling
• Power management control
• Implementation of System Control Registers
The NVIC and the processor core interface are closely coupled, which enables low latency
interrupt processing and efficient processing of late arriving interrupts.
All interrupts including the core exceptions are managed by the NVIC. For more information
on exceptions and NVIC programming, refer to STM32F10xxx Cortex
®
-M3 programming
manual (see Related documents on page 1).
10.1.1 SysTick calibration value register
The SysTick calibration value is set to 9000, which gives a reference time base of 1 ms with
the SysTick clock set to 9 MHz (max HCLK/8).
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