ST STM32F105 series User Manual

Serial peripheral interface (SPI) RM0008
693/1128 DocID13902 Rev 15
25.3 SPI functional description
25.3.1 General description
The block diagram of the SPI is shown in Figure 237.
Figure 237. SPI block diagram
Usually, the SPI is connected to external devices through 4 pins:
• MISO: Master In / Slave Out data. This pin can be used to transmit data in slave mode
and receive data in master mode.
• MOSI: Master Out / Slave In data. This pin can be used to transmit data in master
mode and receive data in slave mode.
• SCK: Serial Clock output for SPI masters and input for SPI slaves.
• NSS: Slave select. This is an optional pin to select a slave device. This pin acts as a
‘chip select’ to let the SPI master communicate with slaves individually and to avoid
contention on the data lines. Slave NSS inputs can be driven by standard IO ports on
the master device. The NSS pin may also be used as an output if enabled (SSOE bit)
and driven low if the SPI is in master configuration. In this manner, all NSS pins from
devices connected to the Master NSS pin see a low level and become slaves when
they are configured in NSS hardware mode. When configured in master mode with
NSS configured as an input (MSTR=1 and SSOE=0) and if NSS is pulled low, the SPI
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ST STM32F105 series Specifications

General

Brand	ST
Model	STM32F105 series
Category	Microcontrollers
Language	English