ST STM32F105 series User Manual

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RM0008 Flexible static memory controller (FSMC)
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Figure 185. FSMC block diagram
21.3 AHB interface
The AHB slave interface enables internal CPUs and other bus master peripherals to access
the external static memories.
AHB transactions are translated into the external device protocol. In particular, if the
selected external memory is 16 or 8 bits wide, 32-bit wide transactions on the AHB are split
into consecutive 16- or 8-bit accesses. The Chip Select is kept low or toggles between the
consecutive accesses when perfoming 32-bit aligned or 32-bit unaligned accesses
respectively.
The FSMC generates an AHB error in the following conditions:
• When reading or writing to an FSMC bank which is not enabled
• When reading or writing to the NOR Flash bank while the FACCEN bit is reset in the
FSMC_BCRx register.
• When reading or writing to the PC Card banks while the input pin FSMC_CD (Card
Presence Detection) is low.
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ST STM32F105 series Specifications

General

Brand	ST
Model	STM32F105 series
Category	Microcontrollers
Language	English