Reset and clock control (RCC)
ï‚· The calibration is used to compensate for the variations in
voltage and temperature that influence the frequency of the
internal HSI RC. Refer to the Application Note AN3300 for
more details on how to calibrate the HSI.
18.2.6.5 RCC_HSICmd
void RCC_HSICmd ( FunctionalState NewState)
Enables or disables the Internal High Speed oscillator (HSI).
ï‚· NewState : new state of the HSI. This parameter can be:
ENABLE or DISABLE.
ï‚· After enabling the HSI, the application software should wait
on HSIRDY flag to be set indicating that HSI clock is stable
and can be used to clock the PLL and/or system clock.
ï‚· HSI can not be stopped if it is used directly or through the PLL
as system clock. In this case, you have to select another
source of the system clock then stop the HSI.
ï‚· The HSI is stopped by hardware when entering STOP and
STANDBY modes.
ï‚· When the HSI is stopped, HSIRDY flag goes low after 6 HSI
oscillator clock cycles.
18.2.6.6 RCC_LSEConfig
void RCC_LSEConfig ( uint32_t RCC_LSE)
Configures the External Low Speed oscillator (LSE).
ï‚· RCC_LSE : specifies the new state of the LSE. This
parameter can be one of the following values:
ï€ RCC_LSE_OFF : turn OFF the LSE oscillator, LSERDY
flag goes low after 6 LSE oscillator clock cycles.
ï€ RCC_LSE_ON : turn ON the LSE oscillator
ï€ RCC_LSE_Bypass : LSE oscillator bypassed with
external clock