ST STM32F31xx User Manual

UM1581
Reset and clock control (RCC)
DocID023800 Rev 1
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Return values
 None.
Notes
 As the LSE is in the Backup domain and write access is
denied to this domain after reset, you have to enable write
access using PWR_BackupAccessCmd(ENABLE) function
before to configure the LSE (to be done once after reset).
 After enabling the LSE (RCC_LSE_ON or
RCC_LSE_Bypass), the application software should wait on
LSERDY flag to be set indicating that LSE clock is stable and
can be used to clock the RTC.
18.2.6.7 RCC_LSEDriveConfig
Function Name
void RCC_LSEDriveConfig ( uint32_t RCC_LSEDrive)
Function Description
Configures the External Low Speed oscillator (LSE) drive
capability.
Parameters
 RCC_LSEDrive : specifies the new state of the LSE drive
capability. This parameter can be one of the following values:
 RCC_LSEDrive_Low : LSE oscillator low drive
capability.
 RCC_LSEDrive_MediumLow : LSE oscillator medium
low drive capability.
 RCC_LSEDrive_MediumHigh : LSE oscillator medium
high drive capability.
 RCC_LSEDrive_High : LSE oscillator high drive
capability.
Return values
 None.
Notes
 None.
18.2.6.8 RCC_LSICmd
Function Name
void RCC_LSICmd ( FunctionalState NewState)
Function Description
Enables or disables the Internal Low Speed oscillator (LSI).
Parameters
 NewState : new state of the LSI. This parameter can be:
ENABLE or DISABLE.
Return values
 None.

ST STM32F31xx Specifications

General

Brand	ST
Model	STM32F31xx
Category	Microcontrollers
Language	English