Abov MC96F6432S Series - Timer 0; Overview

109
MC96F6432S
ABOV Semiconductor Co., Ltd.
11.5 Timer 0
11.5.1 Overview
The 8-bit timer 0 consists of multiplexer, timer 0 counter register, timer 0 data register, timer 0 capture data register and
timer 0 control register (T0CNT, T0DR, T0CDR, T0CR).
It has three operating modes:
− 8-bit timer/counter mode
− 8-bit PWM output mode
− 8-bit capture mode
The timer/counter 0 can be clocked by an internal or an external clock source (EC0). The clock source is selected by
clock selection logic which is controlled by the clock selection bits (T0CK[2:0]).
− TIMER0 clock source: f
X
/2, 4, 8, 32, 128, 512, 2048 and EC0
In the capture mode, by EINT10, the data is captured into input capture data register (T0CDR). In timer/counter mode,
whenever counter value is equal to T0DR, T0O port toggles. Also the timer 0 outputsPWM waveform through
PWM0Oport in the PWM mode.
T0EN
T0MS[1:0]
T0CK[2:0]
Timer 0
1
00
XXX
8-bit Timer/Counter Mode
1
01
XXX
8-bit PWM Mode
1
1X
XXX
8-bit Capture Mode
Table 11.5 Timer 0 Operating Modes