Abov MC96F6432S Series User Manual

133
MC96F6432S
ABOV Semiconductor Co., Ltd.
11.7.4 16-bit PPG Mode
The timer 2 has a PPG (Programmable Pulse Generation) function. In PPG mode, the T2O/PWM2O pin outputs up
to 16-bit resolution PWM output. This pin should be configured as a PWM output by set P1FSRL[3:2] to ‘11’. The
period of the PWM output is determined by the T2ADRH/T2ADRL. And the duty of the PWM output is determined by
the T2BDRH/T2BDRL.
T2MS[1:0]
T2POL
Reload
A Match
T2CC
T2EN
P
r
e
s
c
a
l
e
r
fx
M
U
X
fx/2
fx/4
fx/32
fx/128
fx/512
fx/8
fx/1
Comparator
16-bit Counter
T2CNTH/T2CNTL
16-bit B Data Register
T2BDRH/T2BDRL
Clear
B Match
T1 A Match
Buffer Register B
Comparator
16-bit A Data Register
T2ADRH/T2ADRL
T2IFR
INT_ACK
Clear
To interrupt
block
A Match
Buffer Register A
Reload
Pulse
Generator
T2O/
PWM2O
R
T2EN
3
T2CK[2:0]
2
A Match
T2CC
T2EN
A Match
T2CC
T2EN
T2EN
T2CRH
1
ADDRESS:C3H
INITIAL VALUE : 0000_0000B
–
T2MS1 T2MS0
– – –
T2CC
–
1 1
– – –
X
T2CK2
T2CRL
X
ADDRESS:C2H
INITIAL VALUE : 0000_0000B
T2CK1 T2CK0 T2IFR
–
T2POL
–
T2CNTR
X X X
–
X
–
X
NOTE)
1. The T2EN is automatically cleared to logic “0” after one pulse is generated at a PPG one-shot
mode.
2. T1 A Match is a pulse for the timer 2 clock source if it is selected.
Figure 11.27 16-bit PPG Mode for Timer 2

Abov MC96F6432S Series Specifications

General

Brand	Abov
Model	MC96F6432S Series
Category	Microcontrollers
Language	English