Abov MC96F6432S Series - 17 Appendix; Instruction Table

267
MC96F6432S
ABOV Semiconductor Co., Ltd.
17 APPENDIX
17.1 Instruction Table
Instructions are either1, 2 or 3bytes long as listed in the ‘Bytes’ column below.
Each instruction takes either 1, 2 or 4 machine cycles to execute as listed in the following table. 1 machine cycle
comprises 2 system clock cycles.
ARITHMETIC
Mnemonic
Description
Bytes
Cycles
Hex code
ADD A,Rn
Add register to A
1
1
28-2F
ADD A,dir
Add direct byte to A
2
1
25
ADD A,@Ri
Add indirect memory to A
1
1
26-27
ADD A,#data
Add immediate to A
2
1
24
ADDC A,Rn
Add register to A with carry
1
1
38-3F
ADDC A,dir
Add direct byte to A with carry
2
1
35
ADDC A,@Ri
Add indirect memory to A with carry
1
1
36-37
ADDC A,#data
Add immediate to A with carry
2
1
34
SUBB A,Rn
Subtract register from A with borrow
1
1
98-9F
SUBB A,dir
Subtract direct byte from A with borrow
2
1
95
SUBB A,@Ri
Subtract indirect memory from A with borrow
1
1
96-97
SUBB A,#data
Subtract immediate from A with borrow
2
1
94
INC A
Increment A
1
1
04
INC Rn
Increment register
1
1
08-0F
INC dir
Increment direct byte
2
1
05
INC @Ri
Increment indirect memory
1
1
06-07
DEC A
Decrement A
1
1
14
DEC Rn
Decrement register
1
1
18-1F
DEC dir
Decrement direct byte
2
1
15
DEC @Ri
Decrement indirect memory
1
1
16-17
INC DPTR
Increment data pointer
1
2
A3
MUL AB
Multiply A by B
1
4
A4
DIV AB
Divide A by B
1
4
84
DA A
Decimal Adjust A
1
1
D4