Abov MC96F6432S Series User Manual (English)

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MC96F6432S

ABOV Semiconductor Co., Ltd.

12.5 Release Operation of STOP Mode

After STOP mode is released, the operation begins according to content of related interrupt register just before STOP

mode start (Figure 12.3).If the global interrupt Enable Flag (IE.EA)is set to `1`, the STOP mode isreleased by the

interrupt which each interrupt enable flag = `1` and the CPU jumps to the relevant interrupt service routine. Even if the

IE.EA bit is cleared to ‘0’, the STOP mode is released by the interrupt of which the interrupt enable flag is set to ‘1’.

Figure 12.3 STOP Mode Release Flow

SET PCON[7:0]

SET IEx.b

STOP Mode

IEx.b==1 ?

Interrupt Request

STOP Mode Release

Interrupt Service

Routine

Next Instruction

Corresponding Interrupt

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Abov MC96F6432S Series Specifications

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