Abov MC96F6432S Series - Page 123

123
MC96F6432S
ABOV Semiconductor Co., Ltd.
X 1 2 4 5 6 8 M-1 0 1 3 4
Timer 1 clock
Counter
T1ADRH/L
T1 Interrupt
PWM1O
B Match
Repeat Mode(T1MS = 11b) and "Start High"(T1POL = 0b).
Set T1EN
0
Clear and Start
3 7 2
M
A Match
1. T1BDRH/L(5) < T1ADRH/L
PWM1O
A Match
2. T1BDRH/L >= T1ADRH/L
PWM1O
A Match
3. T1BDRH/L = "0000H"
Low Level
X 1 2 4 5 6 8 M-1 0
Timer 1 clock
Counter
T1ADRH/L
T1 Interrupt
PWM1O
B Match
One-shot Mode(T1MS = 10b) and "Start High"(T1POL = 0b).
Set T1EN
0
Clear and Start
3 7
M
A Match
1. T1BDRH/L(5) < T1ADRH/L
PWM1O
A Match
2. T1BDRH/L >= T1ADRH/L
PWM1O
A Match
3. T1BDRH/L = "0000H"
Low Level
Figure 11.20 16-bit PPG Mode Timming chart for Timer 1