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Abov MC96F6432S Series - Page 152

Abov MC96F6432S Series
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152
MC96F6432S
ABOV Semiconductor Co., Ltd.
FORCE 6-Ch Drive
If FORCA bit sets to ‘0, it is possible to enable or disable PWM output pin and inversion output pin generated through
the duty counter of each channel. The inversion output is the reverse phase of the PWM output. A AA/AB output of the
A-channel duty register, a BA/BB output of the B-channel duty register, a CA/CB output of the C-channel duty register
are controlled respectively. If the UALL bit is set to ‘1’, it is updated B/C channel duty at the same time, when it is
written by a A-channel duty register.
Figure 11.43 Example of Force Drive 6-ch Mode
PWMA
PAAOE
PWM4AA
PABOE
PWM4AB
PBAOE
PWM4BA
PBBOE
PWM4BB
FORCA
-
PAAOE
PABOE
PBAOE
PBBOE
PCAOE
PCBOE
T4PCR2
0
-
X
X
X
X
X
X
ADDRESS :1004H (ESFR)
INITIAL VALUE : 0-00_0000B
C-ch operation is the same with channel A and B waveform
PWMB

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