Abov MC96F6432S Series User Manual

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MC96F6432S
ABOV Semiconductor Co., Ltd.
LVRCR (Low Voltage Reset Control Register): D8H
7
6
5
4
3
2
1
0
LVRST
–
–
LVRVS3
LVRVS2
LVRVS1
LVRVS0
LVREN
R/W
–
–
R/W
R/W
R/W
R/W
R/W
Initial value: 00H
LVRST
LVR Enable when Stop Release
0
Not effect at stop release
1
LVR enable at stop release
NOTE)
1. When this bit is ‘1’, the LVREN bit is cleared to ‘0’ by stop mode to
release. (LVR enable)
2. When this bit is ‘0’, the LVREN bit is not effect by stop mode to
release.
LVRVS[3:0]
LVR Voltage Select
LVRVS3
LVRVS2
LVRVS1
LVRVS0
Description
0
0
0
0
1.60V
0
0
0
1
2.00V
0
0
1
0
2.10V
0
0
1
1
2.20V
0
1
0
0
2.32V
0
1
0
1
2.44V
0
1
1
0
2.59V
0
1
1
1
2.75V
1
0
0
0
2.93V
1
0
0
1
3.14V
1
0
1
0
3.38V
1
0
1
1
3.67V
1
1
0
0
4.00V
1
1
0
1
4.40V
1
1
1
0
Not available
1
1
1
1
Not available
LVREN
LVR Operation
0
LVR Enable
1
LVR Disable
NOTE)
1. The LVRST, LVRVS[3:0] bits are cleared by a power-on reset but are retained by other reset signals.
2. The LVRVS[3:0] bits should be set to ‘0000b’ while LVREN bit is “1”.

Abov MC96F6432S Series Specifications

General

Brand	Abov
Model	MC96F6432S Series
Category	Microcontrollers
Language	English