Agilent Technologies 8719ET Service Guide

SOURCE
A26 HIGH STABILITY
FREQUENCY REFERENCE
(OPTION 1D5)
10 MHz
10 MHz ADJ
A59 SOURCE INTERFACE
CONTROL
AND
BIAS
EXT
AM
LOW BAND ADJ
ALC
OFFSET
SLOPE
LO MED HI
BLANKING ADJ
SOURCE CONTROL SWITCHES FROM A9
LOWBAND
OSCILLATORS
M/A/D/S
A11 PHASE LOCK
10 MHz
PRECISION
REFERENCE
EXT
REF IN
JUMPER (ONLY USED WITH OPTION 1D5)
PLL FROM
SOURCE
CONTROL
BOARD
10
1st IF 10 MHz
PL REF
1 MHz
PRETUNE
DAC
PRETUNE
FM YIG1
RED LED
"UNLOCK"
AMBER LED
"PULL DOWN"
MAIN YIG1
A55 YIG1
A68
ATTN
2.55-20 GHz
W7
A29
A20
W6
W3
W11
3.8 GHz
A53
MIXER/
AMP
A57
FIXED
OSC
A58 M/A/D
J1
J3
STEP
RECOVERY
DIODE
A52 PULSE
GENERATOR
A14 FRACTIONAL-N (DIGITAL)
4
4
N
VCO
60 TO 240 MHz
COUNTER
INPUTS
v
COUNT
GATE
(23)
A13 FRACTIONAL-N (ANALOG)
API ADJ
100 kHZ
FROM A12
API s
TO A10
LSWP
VCXO
40 MHz
10 MHz
1 MHz
4 MHz TO A10
16 kHz
VCXO ADJ
W2
f(11) IF
F=40 MHz
v(12) IF DET
A12 REFERENCE
v(8)
SWPERR
+0.25/GHz
v (9)
f(17) PL REF
V(18)
v(15) VCO TUNE
VCXO
TUNE
39.984 MHz
f(16) 2nd LO 9.996 MHz
40 MHz
v(13)
EXT REF
VCO
W40
W42
0.05-2.55 GHz
LOWBAND
J3
100 kHz TO A13
f(14) 100kHz
W8
W82
W81
W1
W9
W31
J2
J5
J6
J7
J8
J1
J2
J3
J4
B
POWER
A15 PREREGULATOR
A8 POST-REGULATOR
REGULATORS
SWITCHING
POWER
SUPPLY
AND
REGULATOR
A51 TEST SET
INTERFACE
CONTROL
AND
BIAS
STEP
ATTENUATORS
TRANSFER SWITCH
LOWER FT. PANEL
BIAS TO BIAS TEE'S
NORMAL= ON, STEADY
9 GREEN LEDS
NORMAL= OFF
NORMAL= ON
GREEN LED
RED LED
LINE
POWER
A15W1
FAN POWER
MICROCIRCUIT POWER
INSTRUMENT POWER
+25V
+18V
+8V
-8V
-18V
+5VD
A16 REAR PANEL
TEST SET-I/0
INTERFACE
TEST SET-I/0
INTERFACE
EXT BIAS
EXT REF
AUX INPUT
EXT TRIG
EXT AM
TEST SEQ
LIMIT TEST
MEAS RESTART
TO A17
TO A12
TO A10
TO A17
FROM A9
TO A17
A7 CPU
DIN KYBD
INTERCONNECT
RS-232
INTERCONNECT
PARALLEL
INTERCONNECT
GPIB
INTERCONNECT
A1 FRONT PANEL
MEASURE
RESTART
A21
KEYBOARD
RPG
FRONT
PANEL
PROCESSOR
A2 FRONT PANEL INTERFACE
A3 DISK
DRIVE
A22 DISPLAY
INTERFACE
VGA
INTERFACE
VGA
INTERCONNECT
+5 VD
FROM A17
MOTHERBOARD
TO A9
TO A10
TO A51
TO A12
TO A11
TO A14
A19 GSP
DIGITAL
INTERFACE
VIDEO
PALETTE
MEMORY
A18 DISPLAY
TFT
LIQUID
CRYSTAL
DISPLAY
(LCD)
XXX
LIGHT
CAUTION
1.5KV AC START UP
680V AC STEADY STATE
A20
INVERTER ASSY
LEGEND
DIGITAL BUS
This indicates Analog Bus node location.
f = Frequency Node
v = Voltage Node
RECEIVER
A10 DIGITAL IF
TIMING
CONTROL
ADC
ANALOG
BUS
AUX IN
A17
MOTHERBOARD
A4 2nd CONVERTER
A6 2nd CONVERTER
A5 2nd CONVERTER
S
S
1/2
4 MHz FROM A12
SAMPLE
RATE IS
16 kHz
A OUT
B OUT
R OUT
IFA 4 kHz
IFB 4 kHz
IFR 4 kHz
TP18
TP20
TP16
INSTRUMENT
NODES
LSWP (FROM A14)
EXT TRIG
v(1)
+0.37V
v(2)
+2.5V
v(4)
A10 GND
AUX
INPUT
v(3)
A9 SOURCE CONTROL BOARD
SOURCE
CONTROL
SWITCHES TO
A59
W47
W48
W2
PLL OUT TO
PHASE LOCK BD.
S11
S12
TRL
CAL
S11
S21
S12
S22
REV
FWD
TRL
CAL
S21
S22
W49
W23
W34
W21
SAMPLER
BIAS
A65 A SAMPLER
A66 B SAMPLER
F=30 MHz
F=30 MHz
F=30 MHz
J2
J2
J2
J1
J1
J1
A64 R1 SAMPLER
J3
J3
J3
S
SIGNAL SEPARATION: STANDARD, OPT 007, 012
A69 STEP
ATTN
A69 STEP
ATTN
A74 SOLID STATE
TRANSFER SWITCH
A74 MECHANICAL
TRANSFER SWITCH
A56 LOWER
FRONT
PANEL
A56 LOWER
FRONT
PANEL
A61 BIAS TEE
A60 BIAS TEE
A62 DIRECTIONAL
COUPLER
A62 DIRECTIONAL
COUPLER
A63 DIRECTIONAL
COUPLER
A63 DIRECTIONAL
COUPLER
W29
W32
0-55dB
0-55dB
S12/S22
S12/S22
S11/S21
S11/S21
TO A51
TO A51
PORT 1
PORT 2
W28
W27
W25
W26
PORT 1
PORT 1
PORT 2
PORT 2
OPT 007 CHANGES A74
TO A MECHANICAL TRANSFER
SWITCH
W17
W17
OUT
OUT
W30
STANDARD
STANDARD
A
A
IN
IN
W52
W52
W16
W69
OPT 012
W14
W14
W52
W52
W22
W15
W68
OUT
OUT
IN
IN
OPT 012
B
TO A65J2
TO A66J2
SIGNAL SEPARATION: OPT 085
OUT IN
W52
W58
W59
W61
W60
W52
W52
SWITCH COUPLER
SWITCH COUPLER
PORT 1
PORT 2
W63
W62
A70 STEP
ATTN
A71 STEP
ATTN
0-55dB
0-55dB
W65
W66
FROM
A58J2
W36
A72 BUFFER
AMP
R1 LOOP:
STANDARD
W23
R
CHANNEL
OUT
W52
R
CHANNEL
IN
W33
R1 LOOP: OPT 085, 089
A72
BUFFER
AMP
A23
SWITCH
A24
SWITCH
W38
W50
W54
W52
W18
W20
W51
IN
OUT
TO A64J2
TO A58J3
DIN KYBD PORT
INTERFACE
RS-232 PORT
INTERFACE
PARALLEL PORT
INTERFACE
GPIB PORT
INTERFACE
DIGITAL SIGNAL
PROCESSOR
ROM RAM
ADC
REG
EEPROM
MAIN CPU
FLASH
RAM
MAIN RAM
CONTROL/REFRESH
8719ES/8720ES OVERALL BLOCK DIAGRAM FOR STANDARD, OPT 007, 012, 085, 089, 1D5
8719ES/8720ES OVERALL BLOCK DIAGRAM FOR STANDARD, OPT 007, 012, 085, 089, 1D5
sb5106e
W32
A17
W83
W99
W82
J2
J1
J1
J1
J1
J1
J1
J2
J2
J2
J2
J2
J2
J3
J3
J3
J3
J3
J3
W88
FM YIG2
MAIN YIG2
SRC TUNE
SET DAC # LOWBAND
» 4000 READ > 8 dBm
SRC TUNE
SET DAC # HIGH & MIDBAND
3200-4095 READ > 0 dBm
SET DAC # LOWBAND
3750-4095 READ > -5 dBm
CW 1 GHz
TEST PORT POWER -5 dBm
OPEN ON TEST PORT
10 MHz SINEWAVE 0.1V p-p
SMB TEE: A4, A5 OR A6
SRC TUNE
SET DAC # TO 4000
FOR HIGH, MID, & LOWBAND
J2 READS > -5 dBm
J3 READ > -19 dBm

Agilent Technologies 8719ET Specifications

General

Brand	Agilent Technologies
Model	8719ET
Category	Measuring Instruments
Language	English