Anritsu MF2412B - Status Register

5-7
5.4 Device Message List
5.4.3 Status Register
Fig. 5-1 shows the structure of the status register.
7 6543 210
765432 STA MEA
765432 NOG UNC
PON URQ CME EXE DDE QYE RQC OPC
Logical OR
&
&
&
&
&
&
&
&
Logical OR
7 6543 210
&
&
&
&
&
&
&
&
Logical OR
7 6543 210
&
&
&
&
&
&
&
&
76 ESB MAV ERR END 10
Logical OR
7543210
&
&
&
&
&
&
&
Service
Request
Generation
RQS
MSS
(MSB) (LSB)
Standard
Event Status Register
* ESR?
Status Byte Register
* STB?
End Event
Status Register
ESR2?
ERR Event
Status Register
ESR3?
ERR Event
Status Enable
Register
ESE3 <NR1>
ESE3?
End Event
Status Enable
Register
ESE2 <NR1>
ESE2?
Service Request
Enable Register
* SRE <NR1>
* SRE?
Standard
Event Status Enable
Resister
* ESE <NR1>
* ESE?
(LSB)
(LSB)
(LSB)
(LSB)
(LSB)
(LSB)
(LSB)
(MSB)
(MSB)
(MSB)
(MSB)
(MSB)
(MSB)
Output Queue
Queue
Not-Empty
Fig. 5-1 Structure of Status Register