SBC-GX1 Technical Manual Detailed hardware description
Static RAM
The SBC-GX1 is designed to support a 128K byte static RAM device. This device is
decoded using the same memory window as the Flash disk. Selection between Flash
and SRAM is achieved by setting bit 6 in I/O register 259H. If this bit is set to ‘logic 0’
(default) the flash devices are accessed. If this bit is set to ‘logic 1’ the SRAM is
accessed.
The static RAM device is powered from the on-board battery when the main supply is
removed to ensure that data is non-volatile.
Static RAM is not fitted as standard. If you require static RAM, please contact Arcom for
further information regarding build variants which support this part.
Memory map
The following table shows the memory map for the SBC-GX1:
Address Block size Description
0FFFC0000H 256K System BIOS ROM
08FFFFFFH - Extended memory limit (Depending on
SDRAM fitted)
00100000H 255M Extended memory
000E0000H 128K System BIOS ROM and embedded SETUP
000DC000H 16K FlashFX BIOS extension and Flash/SRAM
Disk Window
000C8000H 64K Directed to PC/104 bus
000C0000H 32K VGA BIOS extension
000A0000H 128K Video RAM
00000000H 640K System RAM
© 2004 Arcom Issue D 66
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