ARM ARM7TDMI - Page 29

Open Access
Circuit Descriptions
3-13
ARM Development Board (ARM7TDMI Version)
Hardware Reference Guide
ARM DUI 0017C
DIP switch (S2) has the following positions, where # is the bank number, 0 or 1
The default configuration emulates 2-cycle 32-bit memory in both banks.
Many different configurations are possible. For example:
bank 0 8-bit 5 cycle (250ns @ 20MHz) memory (EPROM emulation)
bank 1 16-bit 2 cycle (100ns @ 20MHz) memory (standard SRAM).
B#CYC1 B#CYC0 Cycles B#SIZ1 B#SIZ0 Size
on on 2 on on 8-bit
on off 3 on off 16-bit
off on 4 off on 32-bit
off off 5 off off 32-bit
Table 3-6: S2 switch positions
Switch Name Position
1 B0CYC0 off
2B0CYC1off
3 B0SIZ0 on
4B0SIZ1on
5 B1CYC0 on
6 B1CYC1 on
7 B1SIZ0 off
8B1SIZ1on
Table 3-7: Switches
hrg.book Page 13 Wednesday, July 22, 1998 9:18 AM