decaWave DW1000 - Page 189

DW1000 User Manual
© Decawave Ltd 2017
Version 2.12
Page 189 of 242
REG:2F:10 – EVC_STO – SFD Timeout Error Counter
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EVC_STO
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0
The bits of the EVC_STO register are described below:
Field
Description of fields within Sub-Register 0x2F:10 – SFD Timeout Error Counter
EVC_STO
reg:2F:10
bits:11–0
SFD timeout errors Event Counter. The EVC_STO field is a 12-bit counter of SFD Timeout Error
events. This is essentially a count of the reporting of RXSFDTO events in Register file: 0x0F –
System Event Status Register.
NB: For this counter to be active, counting needs to be enabled by the setting the EVC_EN bit
in Sub-Register 0x2F:00 – Event Counter Control.
-
bits:15–12
The remaining bits of this register are reserved.
7.2.48.9 Sub-Register 0x2F:12 – Preamble Detection Timeout Event Counter
ID
Length
(octets)
Type
Mnemonic
Description
2F:12
2
RO
EVC_PTO
Preamble Detection Timeout Event Counter
Register file: 0x2F – Digital Diagnostics Interface, sub-register 0x12 is the Preamble Timeout Event Counter.
REG:2F:12 – EVC_PTO – Preamble Detection Timeout Event Counter
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EVC_PTO
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0
The bits of the EVC_PTO register are described below:
Field
Description of fields within Sub-Register 0x2F:12 – Preamble Detection Timeout Event Counter
EVC_PTO
reg:2F:12
bits:11–0
Preamble Detection Timeout Event Counter. The EVC_PTO field is a 12-bit counter of
Preamble detection Timeout events. This is essentially a count of the reporting of RXPTO
events, in Register file: 0x0F – System Event Status Register.
NB: For this counter to be active, counting needs to be enabled by the setting the EVC_EN bit
in Sub-Register 0x2F:00 – Event Counter Control.
-
bits:15–12
The remaining bits of this register are reserved.
7.2.48.10 Sub-Register 0x2F:14 – RX Frame Wait Timeout Event Counter
ID
Length
(octets)
Type
Mnemonic
Description
2F:14
2
RO
EVC_FWTO
RX Frame Wait Timeout Counter
Register file: 0x2F – Digital Diagnostics Interface, sub-register 0x14 is the RX Frame Wait Timeout Event
Counter.