AcuLaser C2800/C2800D/C3800/C3800D Revision C
OPERATING PRINCIPLES Features of the Controller 74
Confidential
DIAGRAM
Overview of connections of the clock and the data bus is shown below:
Figure 2-56. Circuity Block Diagram
Table 2-4. Main Elements Explanation
IC Name Reference Function/Specification
CPU IC101 Device: PowerPC 750FL-600
Clock speed: 600MHz
FMV IC102 ASIC for memory control and video control
FAIO IC401 ASIC for I/O control
PLD (Programmable Logic Device) IC103 Interface between CPU and FMV
PWM (Pulse Width Modulation) IC601 Pulse duration of video signal control IC
Controls frequency between FMV and
engine I/F.
EEPROM IC402 Stores printer setting information, history,
and so on.
Capacity: 256 Kbyte
SSCG
(Spread Spectrum Clock Generator)
IC501 Clock generator
Controls emission noise from devices by
fluctuating frequency among them.
PCC IC400 Panel control IC
RESET IC IC502 Resets the system by detecting power-on,
power-off, and intermittent discontinuity.
Table 2-5. Signals Explanation
Signal Name Function
CPUCLK System clock for CPU
SPD A signal for getting DIMM information
EVCLK Video clock
PDCLK PWM clock
VIDEOX CMYK Video signal
HSYNCX CMYK Hsync signal
PD CMYK Video data
VSYNCX CMYK Vsync signal
CMD Engine command signal
STS Engine status signal
FAIOCLK System clock for FAIO
CPSCLK System clock for PCC
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