Epson DFX-9000 - Page 87

Epson DFX-9000 Revision B
Operating Principles Circuit operation 80
The table below shows the dot-matrix-printer-specific circuit modules
on the SoC ASIC
Table 2-8. SoC ASIC functional modules
Module Description
SIDM_PERI_GAU Gate-array decode unit. This module generates a
Chip-Enable signal to select each functional
module of the ASIC.
RDU Data-bus control module (to CPU core)
CLKU System clock control unit.
This module controls the clock used by each
module of the ASIC.
SDRAM_CNTL External SDRAM control unit. (R/W, Auto-
refresh, Initialize)
BMU Bit Manipulation unit.
This module processes the print data and
modifies it for specific printing modes (enlarge,
Italicize, Super/Sub-Script conversion, etc.)
IOU I/O Control Unit.
IBCU The Input Buffer Control unit controls the input
buffer pointer address (R/W) and the buffer size.
USB USB I/F (1.1/Full speed device compliant)
Control unit.
PIFU IEEE 1284 Parallel I/F Control unit.
TYPEBIFU Type-B I/F port control unit.
TIMER_PRES 8-bit timer pre-scaler.
(used for generating a reference clock for the
serial communication speed control (Baud-
rate).)
SCH0TIMER 8-bit timer for Channel 0.
(for generating a reference clock (Baud-rate).)
SCH1TIMER Same as above (for Channel 1).
Table 2-8. SoC ASIC functional modules (continued)
Module Description