Freescale Semiconductor MC68332 - 5.2 CPU32 Registers

CENTRAL PROCESSING UNIT MC68332
5-2 USER’S MANUAL
Figure 5-1 CPU32 Block Diagram
5.2 CPU32 Registers
The CPU32 programming model consists of two groups of registers that correspond
to the user and supervisor privilege levels. User programs can use only the registers
of the user model. The supervisor programming model, which supplements the user
programming model, is used by CPU32 system programmers who wish to protect sen-
sitive operating system functions. The supervisor model is identical to that of the
MC68010 and later processors.
The CPU32 has eight 32-bit data registers, seven 32-bit address registers, a 32-bit
program counter, separate 32-bit supervisor and user stack pointers, a 16-bit status
register, two alternate function code registers, and a 32-bit vector base register (see
Figure 5-2 and Figure 5-3).
INSTRUCTION PIPELINE
STAGE STAGE
CB
EXECUTION UNIT
PROGRAM
COUNTER
SECTION
DATA
SECTION
WRITE PENDING
BUFFER
PREFETCH
CONTROLLER
MICROBUS
CONTROLLER
ADDRESS
BUS
DATA
BUS
BUS CONTROL
SIGNALS
STAGE
A
MICROSEQUENCER AND CONTROL
BUFFER
DECODE
CONTROL STORE
CONTROL LOGIC
1127A
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