MC68332 SYSTEM INTEGRATION MODULE
USER’S MANUAL 4-27
When AS, DS, and R/W are valid, a peripheral device either places data on the bus
(read cycle) or latches data from the bus (write cycle). At the appropriate time, chip-
select logic asserts data and size acknowledge signals.
The DSACK
option fields in the chip-select option registers determine whether inter-
nally generated DSACK
or externally generated DSACK are used. For fast termination
cycles, the F-term encoding (%1110) must be used. Refer to 4.8.1 Chip-Select Reg-
isters for information about fast-termination setup.
To use fast-termination, an external device must be fast enough to have data ready,
within the specified setup time, by the falling edge of S4. Refer to APPENDIX A ELEC-
TRICAL CHARACTERISTICS for tabular information about fast termination timing.
When fast termination is in use, DS
is asserted during read cycles but not during write
cycles. The STRB field in the chip-select option register used must be programmed
with the address strobe encoding to assert the chip select signal for a fast-termination
write.
4.5.4 CPU Space Cycles
Function code signals FC[2:0] designate which of eight external address spaces is ac-
cessed during a bus cycle. Address space 7 is designated CPU space. CPU space is
used for control information not normally associated with read or write bus cycles.
Function codes are valid only while AS
is asserted. Refer to 4.4.1.7 Function Codes
for more information on codes and encoding.
During a CPU space access, ADDR[19:16] are encoded to reflect the type of access
being made. Figure 4-11 shows the three encodings used by 68300 family microcon-
trollers. These encodings represent breakpoint acknowledge (Type $0) cycles, low
power stop broadcast (Type $3) cycles, and interrupt acknowledge (Type $F) cycles.
Refer to 4.7 Interrupts for information about interrupt acknowledge bus cycles.
Figure 4-11 CPU Space Address Encoding
CPU SPACE CYC TIM
0000000000000000000 T0BKPT#
1923 16
000000111111111111111110
19 1623
111
111
11111111111111111111 1111
LEVEL
19 1623
CPU SPACE CYCLES
FUNCTION
CODE
20
20
20
0
0
0
CPU SPACE
TYPE FIELD
ADDRESS BUS
BREAKPOINT
ACKNOWLEDGE
LOW POWER
STOP BROADCAST
INTERRUPT
ACKNOWLEDGE
241
Fr
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Freescale Semiconductor, Inc.
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