MC68332 SYSTEM INTEGRATION MODULE
USER’S MANUAL 4-53
A pin programmed as a discrete output drives an external signal to the value specified
in the pin data register. No discrete output function is available on pins CSB
OOT, BR,
B
G, or BGACK. ADDR23 provides ECLK output rather than a discrete output signal.
When a pin is programmed for discrete output or alternate function, internal chip-select
logic still functions and can be used to generate DSA
CK or AVEC internally on an ad-
dress and control signal match.
4.8.1.2 Chip-Select Base Address Registers
Each chip select has an associated base address register. A base address is the low-
est address in the block of addresses enabled by a chip select. Block size is the extent
of the address block above the base address. Block size is determined by the value
contained in a BLKSZ field. Block addresses for different chip selects can overlap.
The BLKSZ field determines which bits in the base address field are compared to cor-
responding bits on the address bus during an access. Provided other constraints de-
termined by option register fields are also satisfied, when a match occurs, the
associated chip-select signal is asserted. Table 4-21 shows BLKSZ encoding.
The chip-select address compare logic uses only the most significant bits to match an
address within a block. The value of the base address must be a multiple of block size.
Base address register diagrams show how base register bits correspond to address
lines.
After reset, the MCU fetches the initialization routine from the address contained in the
reset vector, located beginning at address $000000 of program space. To support
bootstrap operation from reset, the base address field in chip-select base address reg-
ister boot (CSBARBT) has a reset value of all zeros. A memory device containing the
reset vector and initialization routine can be automatically enabled by CSBOOT
after
a reset. The block size field in CSBARBT has a reset value of 512 Kbytes. Refer to
4.8.4 Chip-Select Reset Operation for more information.
4.8.1.3 Chip-Select Option Registers
Option register fields determine timing of and conditions for assertion of chip-select
signals. To assert a chip-select signal, and to provide DSACK
or autovector support,
other constraints set by fields in the option register and in the base address register
must also be satisfied. Table 4-22 is a summary of option register functions.
Table 4-21 Block Size Encoding
BLKSZ[2:0] Block Size Address Lines Compared
000 2 Kbyte ADDR[23:11]
001 8 Kbyte ADDR[23:13]
010 16 Kbyte ADDR[23:14]
011 64 Kbyte ADDR[23:16]
100 128 Kbyte ADDR[23:17]
101 256 Kbyte ADDR[23:18]
110 512 Kbyte ADDR[23:19]
111 1 Mbyte ADDR[23:20]
Fr
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Freescale Semiconductor, Inc.
For More Information On This Product,
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