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Freescale Semiconductor MC68332 - SECTION 7 TIME PROCESSOR UNIT; 7.1 General

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MC68332 TIME PROCESSOR UNIT
USER’S MANUAL 7-1
SECTION 7TIME PROCESSOR UNIT
The time processor unit (TPU) is an intelligent, semi-autonomous microcontroller de-
signed for timing control. Operating simultaneously with the CPU, the TPU schedules
tasks, processes ROM instructions, accesses shared data with the CPU, and performs
input and output. Figure 7-1 is a simplified block diagram of the TPU.
Figure 7-1 TPU Block Diagram
7.1 General
The TPU can be viewed as a special-purpose microcomputer that performs a pro-
grammable series of two operations, match and capture. Each occurrence of either
operation is called an event. A programmed series of events is called a function. TPU
functions replace software functions that would require host CPU interrupt service.
The following pre-programmed timing functions are currently available:
• Input capture/input transition counter
• Output compare
• Pulse-width modulation
• Synchronized pulse-width modulation
• Period measurement with additional transition detect
• Period measurement with missing transition detect
• Position-synchronized pulse generator
• Stepper motor
• Period/pulse-width accumulator
T2CLK
PINS
SERVICE REQUESTS
DATA
TCR1
TCR2
MICROENGINE
CONTROL
STORE
EXECUTION
UNIT
I M B
PARAMETER
RAM
CHANNEL
CONTROL
DEVELOPMENT
SUPPORT AND TEST
SYSTEM
CONFIGURATION
SCHEDULER
CONTROL AND DATA
CONTROL
TIMER
CHANNELS
CHANNEL 0
CHANNEL 1
CHANNEL 15
CHANNEL
DATA
TPU BLOCK
HOST
INTERFACE
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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